DUE TO promising applications of zinc oxide (ZnO) thinfilm

2736 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 10, OCTOBER 2008 Impact of Hydrogenation of ZnO TFTs by Plasma-Deposited Silicon Nitride Gate Dielectric Kariyadan Remashan, Dae-Kue Hwang, Seong-Ju Park, and Jae-Hyung Jang, Member, IEEE Abstract Plasma-enhanced chemical vapor deposition grown silicon nitride gate insulator with high refractive index of 2.39 was employed as the source of hydrogen to hydrogenate zinc oxide (ZnO) thin-film transistors (TFTs) with bottom-gate configuration. The hydrogenated TFTs exhibited a field-effect mobility of 7.8 cm 2 /V s, an on/off current ratio of 10 6, and a subthreshold slope of 1.2 V/dec. In comparison, TFTs using silicon nitrides with lower refractive indices of 2.26, 1.92, and 1.80 showed relatively poor performance. Dynamic secondary ion mass spectroscopy study showed that the amount of hydrogen present in the ZnO TFT structures using high refractive index silicon nitride gate dielectric is higher than that in the TFT samples using low-refractive index silicon nitride, which indicate the evidence of hydrogenation of ZnO TFTs by high refractive index silicon nitride gate dielectric. The enhanced performance of the hydrogenated TFTs is attributed to the passivation of ZnO/dielectric interface states and doping of the channel by hydrogenation effect. Index Terms High-refractive silicon nitride, hydrogenation, secondary ion mass spectroscopy (SIMS), zinc oxide (ZnO) thinfilm transistors (TFTs). I. INTRODUCTION DUE TO promising applications of zinc oxide (ZnO) thinfilm transistors (TFTs) in liquid crystal displays and organic light-emitting diode displays, these devices have been extensively studied. Hydrogenation is one of the methods by which performance of ZnO TFTs can be improved [1], [2] because hydrogen acts as a defect passivator [2] and a shallow n-type dopant [3] in ZnO materials. ZnO TFTs annealed in the forming gas ambient exhibited higher current and better field-effect mobility as compared to those annealed in N 2 [2]. Under this method of hydrogenation of bottom-gated TFTs, top surface of the ZnO channel layer is exposed to more hydrogen than the amount of hydrogen reaching at the channel/dielectric interface at any time during the exposure. Consequently, the electron concentration in the top region of the channel will be higher than that near the channel/dielectric interface. This will result in higher off-current because the current flow through the undepleted channel region contributes to the leakage current Manuscript received March 13, 2008; revised May 16, 2008. Current version published September 24, 2008. This work was supported in part by the KOSEF under Grant R01-2007-000-10843-0 and in part by the SEAHERO program under Grant 07SEAHEROB01-03. The review of this paper was arranged by Editor C.-Y. Lu. K. Remashan and J.-H. Jang are with the Department of Information and Communications, Gwangju Institute of Science and Technology, Gwangju 500-712, Korea (e-mail: jjang@gist.ac.kr). D.-K. Hwang and S.-J. Park are with the Department of Materials Science and Engineering, Gwangju Institute of Science and Technology, Gwangju 500-712, Korea. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2008.2003021 Fig. 1. Schematic cross-sectional views of hydrogenation by (a) conventional method and (b) our method. (c) Schematic representation of maximum and minimum amount of hydrogen in the channel for the case of conventional and our methods. of devices in the OFF-state [1], [2], [4]. Better off-current and on/off current ratio can be achieved if hydrogen doping of the channel can be realized by incorporating hydrogen into the channel from the gate dielectric side, instead of incorporating hydrogen from the top surface side of the channel. In this paper, we introduce a new technique of hydrogenation of ZnO TFTs by using gate dielectric. Schematic representation of conventional method and our method of hydrogenation are shown in Fig. 1(a) and (b), respectively. Fig. 1(c) shows schematic representation of maximum (H max ) and minimum (H min ) amount of hydrogen in conventional (con) and our (our) methods. Plasma-enhanced chemical vapor deposition (PECVD) grown silicon nitride contains a significant amount of hydrogen [5] and it can acts as a source of hydrogen [6]. Although ZnO TFTs using PECVD grown silicon nitride gate insulator have been reported [7] [12], none of the papers describe any kind of effect due to presence of hydrogen in the silicon nitride gate insulator on the performances of TFTs. Silicon nitride with a high refractive index has higher density of Si H bonds compared to that in the film with a lower refractive index [13] and the Si H bonds are weaker compared to N H bonds [14]. In order to hydrogenate ZnO TFTs by gate dielectric, we have used PECVD grown silicon nitride of high refractive 0018-9383/$25.00 2008 IEEE

REMASHAN et al.: IMPACT OF HYDROGENATION OF ZnO TFTs 2737 TABLE I DEPOSITION CONDITIONS, REFRACTIVE INDEX, AND DIELECTRIC CONSTANTS OF THE SILICON NITRIDE FILMS index of 2.39 (SiN_2.39) as the hydrogen source, and ZnO TFTs were fabricated. For comparison and systematic studies, we have also fabricated TFTs using silicon nitride of lower refractive indices, such as silicon nitride with a refractive index of 2.26 (SiN_2.26), silicon nitride with a refractive index of 1.92 (SiN_1.92), and silicon nitride with a refractive index of 1.80 (SiN_1.80), because the density of Si H bonds decreases with decreasing refractive index [13]. In order to verify hydrogenation of the ZnO TFTs, depth profiles of the TFT samples were obtained using dynamic secondary ion mass spectroscopy (DSIMS). II. EXPERIMENT Corning 1737 glass coated with 200-nm-thick indium tin oxide (ITO) was used as starting substrates (Delta Technologies, Ltd., USA) for fabricating bottom-gated TFTs, and the ITO acts as the gate electrode. Device fabrication details were described elsewhere [15]. After the gate electrode patterning, silicon nitride gate dielectric film was deposited by PECVD. In this paper, four types of silicon nitride gate dielectric films were used. The details of the deposition conditions, refractive indices and dielectric constants of the four films are described in the next paragraph. After the gate electrode patterning, four types of about 200-nm-thick silicon nitride gate dielectric films with refractive indices of 2.39, 2.26, 1.92, and 1.80 were deposited by PECVD using SiH 4,NH 3, and N 2 gases. After the silicon nitride formation, 250 nm of RF magnetron sputtered undoped ZnO channel layer was deposited at 350 C and patterned. The sputtering was carried out in a mixed ambient of O 2 and Ar (Ar/O 2 gas flow ratio = 4/1) with an RF power of 100 W and working pressure of 15 mtorr. Ti/Pt/Au (20/30/150 nm) metals deposited by e-beam evaporation were used for the source and drain contacts. To access the bottom gate electrode, plasma etching of silicon nitride was performed. Four types of about 200-nm-thick silicon nitride gate dielectric films with refractive indices of 2.39, 2.26, 1.92, and 1.80 were deposited by PECVD using SiH 4,NH 3, and N 2 gases. The deposition conditions and dielectric constants of the deposited films are listed in Table I. The deposition parameters for the SiN_2.39 were: flow rate of SiH 4 /NH 3 /N 2 = 400/20/600 sccm, pressure = 650 mtorr, power = 30 W, and temperature = 300 C. The growth parameters for the other films, such as SiN_2.26, SiN_1.92, and SiN_1.80 were the same except for the flow rate of SiH 4. The flow rate of SiH 4 used for the deposition of SiN_2.26, SiN_1.92, and SiN_1.80 were 300, 100, and 20 sccm, respectively. The PECVD chamber electrode size is 205 mm in diameter. Dielectric constants of the deposited silicon nitride films were measured by separately fabricating metal insulator metal capacitors on Corning 1737 glass substrates based on ITO, silicon nitride, and Ti/Pt/Au. The extracted dielectric constants obtained from the 1-MHz capacitance voltage characteristics were 7.9, 7.4, 6.7, and 6.1 for SiN_2.39, SiN_2.26, SiN_1.92, and SiN_1.80, respectively. The fabricated TFTs were subjected to rapid thermal annealing (RTA) in N 2 ambient to improve their electrical performance. Electrical characteristics of the TFTs, having channel width (W ) of 200 μm and channel length (L) of 20 μm, were measured using a semiconductor parameter analyzer (HP-4155A). Depth profiles of the TFT structures were obtained by DSIMS using a Cameca IMS4F-E7 instrument. For the SIMS measurements, cesium ion (C + s ) beam was used as the primary ion source, and the energy and approximate current of the primary beam were 14.5 kev and 100 na, respectively. III. RESULTS AND DISCUSSION A. Characteristics of ZnO TFTs The as-fabricated TFTs using all the four silicon nitride films (SiN_2.39, SiN_2.26, SiN_1.92, and SiN_1.80) exhibited currents only in the picoampere range due to low electron concentration in the ZnO channel layer. Postfabrication annealing of the fabricated ZnO TFTs was performed in the N 2 ambient [2], [4] and the annealing conditions (temperature and duration) are adjusted to obtain well-defined output characteristics with drain current in the microampere level. For TFTs using SiN_2.39 and SiN_2.26, an RTA at 300 C for 5 min is adequate to obtain current in the microampere level. Fig. 2(a) shows output characteristics, drain current (I D ) versus drain-to-source voltage (V DS ), of TFTs with SiN_2.39, after an RTA at 300 for 5 min. The gate-to-source voltage (V GS ) was varied from 40 to 10 V in steps of 5 V. The output characteristics exhibit clear pinch-off behavior and the TFT operates as an n-channel enhancement mode device. Transfer characteristics, I D versus gate-to-source voltage (V GS ), were measured at V DS = 20 V, and these results are shown in Fig. 2(b). The on-current and off-current were estimated as the maximum and minimum currents, respectively, observed on the transfer characteristics for V DS = 20 V. From Fig. 2(b), it can be seen that the offcurrent is 2 10 10 A, and the on-current is about 130 μa. The resulting on/off current ratio is about 10 6. Fig. 2(b) also shows variation of gate current measured as a function of V GS at a fixed V DS of 20 V. It is noteworthy that the off-current is limited by the gate current because gate current is almost the

2738 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 10, OCTOBER 2008 Fig. 2. Characteristics of ZnO TFTs using SiN_2.39 after RTA at 300 Cfor 5 min. (a) Output characteristics (V GS from40to15vinstepsof 5 V),and (b) Transfer characteristics and gate leakage current at V DS = 20 V. Fig. 3. Characteristics of ZnO TFTs SiN_2.26 after RTA at 300 Cfor 5 min. (a) Output characteristics (V GS from 40 to 15 V in steps of 5 V),and (b) Transfer characteristics and gate leakage current at V DS = 20 V. same as drain current in the OFF-state in Fig. 2(b). From the X-ray photoelectron spectroscopy analysis, it was found out that the high refractive index silicon nitride film (SiN_2.39) was Si-rich. Large gate leakage current observed in TFTs using SiN_2.39 can be due to domination of Poole Frenkel type of conduction mechanism present in Si-rich silicon nitride films. [16], [17]. The output and transfer characteristics of the TFTs using SiN_2.26, after an RTA at 300 C for 5 min, are shown in Fig. 3(a) and (b), respectively. The output characteristics were measured for the gate voltage varying from 40 to 15 V in steps of 5 V. As shown in Fig. 3(a), the devices exhibit clear pinchoff behavior and operate in the enhancement mode. From the transfer characteristics shown in Fig. 3(b), it is clear that the off-current is about 4 10 11 A, and the on/off current ratio is about 10 6. It can be seen from Fig. 3(b) that the off-current is not limited by the gate leakage current. For TFTs using SiN_1.92, annealing at 300 C for a longer duration of 10 min is required to obtain current about 40 μa, and the obtained electrical characteristics of these devices are shown in Fig. 4. As seen from Fig. 4(b), the off-current and the on/off current ratio are 2 10 8 A and 10 3, respectively. Since the gate current is only about 10 10 A, the larger offcurrent of 2 10 8 A is not caused by the gate current. Now, the off-current is dominated by the drain current flow through the ZnO channel, and this current depends on the conductivity of the channel layer. Higher temperature annealing is required to obtain current about 35 μa for the TFTs employing SiN_1.80, and the obtained electrical characteristics of these devices after 350 C for 10-min annealing are shown in Fig. 5. The output characteristics were measured for the V GS from 40 to 5 V in steps of 5 V. It can be noticed from the output characteristics that these device do not exhibit clear pinch-off behavior. This can be attributed to drain current flow through the ZnO channel even in the absence of charge accumulation layer at the ZnO/dielectric interface [18]. The off-current of the devices has now increased to about 0.8 μa [Fig. 5(b)] and the resulting on/off current ratio is less than 10 2. From Fig. 5(b), it is clear that the higher off-current is not caused by the gate current because the drain current of 0.8 μa is much higher than the gate current of 10 10 AintheOFF-state. The higher off-current can be due to additional drain current flow other than via accumulation layer. From Figs. 2(b) and 3(b), it is noticed that gate current increases with gate voltage from 20 to 40 V for TFTs using SiN_2.39 and SiN_2.26. However, the correlation between the better device performance and large gate leakage current cannot directly be correlated because performance of TFTs employing

REMASHAN et al.: IMPACT OF HYDROGENATION OF ZnO TFTs 2739 Fig. 4. Characteristics of ZnO TFTs using SiN_1.92 after RTA at 300 Cfor 10 min. (a) Output characteristics (V GS from40to15vinstepsof 5V),and (b) Transfer characteristics and gate leakage current at V DS = 20 V. SiN_1.92 is better than those using SiN_1.80 (Tables II and III), although, in both cases, the gate current [Figs. 4(b) and 5(b)] is almostthesamefrom20to40v. RTA conditions, off-current, and on/off current ratio of the TFTs employing all the four silicon nitride films are summarized in Table II. It is clear from these data that for the TFTs using SiN_2.39 and SiN_2.26, an RTA at 300 C for 5 min is sufficient to obtain drain current, respectively, about 130 and 50 μa. On the other hand, TFTs using SiN_1.92 required 10-min annealing at 300 C, and higher temperature annealing at 350 C for 10 min is required for TFTs employing the SiN_1.80. These longer and higher temperature annealings degrade device performances. TFTs employing SiN_2.39 and SiN_2.26 exhibit on/off current ratio of about 10 6, while the on/off current ratios for devices using SiN_1.92 and SiN_1.80 are, respectively, 10 3 and less than 10 2. In terms of offcurrent and on/off current ratio, the performance of TFTs using SiN_2.39 and SiN_2.26 are much better than that of TFTs using SiN_1.92 and SiN_1.80. It can be suggested that hydrogen from the relatively higher amounts of Si H bonds present in the SiN_2.39 and SiN_2.26 is playing the role of doping the channel at a lower annealing temperature of 300 C. This kind of doping may be taking place mainly near the semiconductor/ dielectric interface, resulting to higher carrier concentration near the interface compared to that near the top region of the channel. This can be the cause for the low off-current and high Fig. 5. Characteristics of ZnO TFTs using SiN_1.80 after RTA at 350 Cfor 10 min. (a) Output characteristics (V GS from40to5vinstepsof 5 V),and (b) transfer characteristics and gate leakage current at V DS = 20 V. on/off current ratio of TFTs using SiN_2.39 and SiN_2.26. On the other hand, oxygen vacancies created during the annealing can be acting as a major factor for carrier concentration in TFTs using SiN_1.92 and SiN_1.80 [15] because it is known that oxygen vacancies act as free carriers in undoped ZnO films [19]. The higher off-current and poor on/off current ratio of TFTs using SiN_1.92 and SiN_1.80 can be attributed to the current flow through the ZnO channel in the OFF-state. B. Extraction of Subthreshold Slope, Interface State Density, and Field-Effect Mobility The subthreshold slope (S) of the TFTs is extracted from transfer characteristics of the devices in the subthreshold regime using the following equation: S = dv GS d(log I D ). (1) The estimated subthreshold slope of TFTs using SiN_2.39, SiN_2.26, SiN_1.92, and SiN_1.80 are 1.2, 2.9, 8.9, and 20.64 V/dec, respectively. It is clear that the S of TFTs improves with the refractive index of the silicon nitride film. In this case, the TFTs using SiN_2.39 exhibits the lowest S of 1.2 V/dec, and this value is significantly lower with respect to that of TFTs using SiN_1.80. From the subthreshold slope, we

2740 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 10, OCTOBER 2008 TABLE II RTA PARAMETERS, OFF-CURRENT, AND ON/OFF CURRENT RATIO OF TFTs EMPLOYING FOUR TYPES OF SILICON NITRIDE AS GATE INSULATOR TABLE III SUBTHRESHOLD SLOPE, INTERFACE STATE DENSITY, AND FIELD-EFFECT MOBILITY OF TFTs EMPLOYING FOUR TYPES OF SILICON NITRIDE AS GATE INSULATOR can calculate the equivalent maximum density of states (Ns max ) present at the interface between ZnO channel and silicon nitride film, as shown in the following equation [20]: N max s = ( S log e kt/q 1 ) Ci where k is the Boltzmann constant, T is the temperature, C i is the capacitance per unit area of the gate insulator, and q is the unit charge. The maximum interface state density of TFTs having SiN_2.39, SiN_2.26, SiN_1.92, and SiN_1.80 is estimated to be 4.9 10 12,9.9 10 12,2.8 10 13 and 6.1 10 13 /cm 2, respectively. As expected from the S values, the TFTs using the SiN_2.39 exhibits the lowest Ns max value. The field-effect mobility (μ FE ) of polycrystalline ZnO TFTs operating in saturation region can be extracted by using the following current equation [21]: I D = 1 2 C W iμ FE L (V GS V T ) 2 (3) where V T is the threshold voltage. The μ FE and V T were evaluated from the slope and intercept, respectively, of a straight line fitted to the plot of I D versus V GS. The estimated μ FE of TFTs employing SiN_2.39, SiN_2.26, SiN_1.92, and SiN_1.80 are 7.8, 2.9, 0.9, and 0.39 cm 2 /V s, respectively. These results showed that the TFTs using SiN_2.39 exhibit better field-effect mobility. It can be observed that the estimated μ FE values show a steady increase with the refractive index of the gate dielectric film. The calculated V T of TFTs with SiN_2.39, SiN_2.26, SiN_1.92, and SiN_1.80 are 28.4, 30, 23, and 16.5 V, q (2) respectively. Since the TFTs employ silicon nitride of different refractive indices, it is difficult to cite the reasons for this V T change because this parameter is dependent on the properties of gate dielectric and dielectric/semiconductor interface, in addition to the quality and doping concentration of the ZnO channel. However, in general, V T will be higher in devices where the channel carrier concentration is less because higher gate voltage is required to obtain accumulation of charges in the semiconductor/dielectric interface [22]. Therefore, it can be suggested that TFTs using SiN_2.39 has lower channel carrier concentration as compared to TFTs using SiN_1.80. The extracted parameters, such as subthreshold slope, maximum interface state density, and field-effect mobility of the TFTs are summarized in Table III. The performance of TFTs with SiN_2.39 is better than that of TFTs using SiN_2.26, SiN_1.92, and SiN_1.80 in terms of field-effect mobility, subthreshold slope, and maximum interface state density. The devices show a steady improvement with the increase in refractive index of the gate dielectric film. The improved performance of the TFTs may be due to reduction of interface states between gate dielectric and ZnO film, passivation of bulk defects in the ZnO channel [3], and increase of carriers due to doping in the channel [2] as a result of hydrogen incorporation from the silicon nitride film. According to Parsons et al. [13], the density of Si H bonds increases with refractive index of the PECVD silicon nitride film, and therefore, in the present case, SiN_2.39 will have more Si H bonds compared to SiN_2.26, SiN_1.92, and SiN_1.80. Therefore, the Si H bonds may effectively provide hydrogen, which can act as defect passivators and shallow dopants, in the case of TFTs using a SiN_2.39 under

REMASHAN et al.: IMPACT OF HYDROGENATION OF ZnO TFTs 2741 Fig. 7. Comparison of SIMS depth profiles of nonannealed and annealed TFT samples using SiN_2.39. Fig. 6. SIMS depth profiles of the TFT samples using (a) SiN_2.39 and (b) SiN_1.80. an RTA at 300 C. Moreover, the better subthreshold slope in TFTs with SiN_2.39 can also be ascribed to the effective passivation of defects present at the ZnO/SiN_2.39 interface as evidenced by an order of magnitude lower Ns max at the interface of ZnO/SiN_2.39 compared to that at the interface of ZnO/SiN_1.80. C. SIMS Analysis of ZnO TFT Samples SIMS has been used to obtain depth profiling of elements such as hydrogen, zinc, and oxygen in ZnO materials [1], [23], [24]. Since the fabricated TFTs using SiN_2.39 and SiN_1.80 exhibit the highest and lowest performances, respectively, SIMS studies were carried out on the TFT structures based on these two dielectric films. These samples were subjected to the same annealing conditions as that used for their TFT counterparts. SIMS depth profiles of H, Zn, and Si elements for the TFT samples employing SiN_2.39 and SiN_1.80 are shown in Fig. 6(a) and (b), respectively. Calibration values to convert SIMS data from counts per second to concentration values in atoms per cubic centimeter are not readily accessible, and therefore, the SIMS data is presented in the units of counts per second. It is clear from Fig. 6(a) that the intensity of the hydrogen at the ZnO/SiN_2.39 interface is about 3 10 6 counts/s. The intensity of hydrogen at the ZnO/SiN_1.80 interface is about 10 5 counts/s [Fig. 6(b)], which is about one order of magnitude lower than that in the case of TFTs using SiN_2.39. Also, the amount of hydrogen present in the ZnO channel for the TFTs employing SiN_2.39 is higher than that in the channel for TFTs using SiN_1.80. Therefore, the better electrical performance of ZnO TFTs employing SiN_2.39 can be attributed to hydrogenation of the ZnO/SiN_2.39 interface and ZnO channel by the SiN_2.39. In order to examine the effect of RTA on the hydrogen profile in the ZnO channel, depth profiles of the nonannealed and annealed (300 C, 5 min) TFT samples using SiN_2.39 are compared and shown in Fig. 7. In both cases, the sharp fall in the Zn profile is taken as the interface between ZnO and silicon nitride. It can be noticed that sputter rate of the annealed sample is lower than that of nonannealed sample, and this results in the higher sputter time for the annealed sample to reach at the ZnO/SiN_2.39 interface. From the Fig. 7, it is clear that annealing step increases hydrogen content in ZnO and in ITO. From the profiles, it can be seen that for the annealed sample, the amount of hydrogen at the ZnO/SiN_2.39 interface is about 3 10 6 (counts/s) and that for the nonannealed sample is only 1 10 6 (counts/s). For the annealed sample, the amount of hydrogen changes from 3 10 6 counts/s at the ZnO/SiN_2.39 interface to about 2 10 5 counts/s in the ZnO bulk, whereas for the nonannealed samples, the amount of hydrogen changes from 1 10 6 counts/s at the interface to about 1.5 10 5 counts/s in the bulk. This indicates that the annealing step effectively increases the amount of hydrogen in the ZnO channel. The mechanism of the increase in hydrogen content is due to incorporation of hydrogen from the Si H bonds present in the silicon nitride gate dielectric. It is interesting to note that a very slight increase in the hydrogen observed in the silicon nitride. It may be attributed to the measurement errors due to the calibration between sample to sample. More meaningful data can be obtained if the SIMS data are quantified and presented in the units of atoms per cubic centimeter. Major hydrogen reduction is not observed in the silicon nitride film because the increase of hydrogen in ZnO and in ITO is very small compared to the amount of hydrogen in the silicon nitride film. Another important aspect clear from the Fig. 7 is that even in the case of nonannealed sample, there is presence of hydrogen in the ZnO

2742 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 10, OCTOBER 2008 channel, and this can be due to hydrogen incorporation from the SiN_2.39 during the sputter growth of ZnO on the SiN_2.39 deposited ITO coated glass substrates. IV. CONCLUSION The effect of hydrogenation of ZnO TFTs by gate dielectric film on their electrical performance has been studied by using silicon nitride films having refractive indices of 2.39, 2.26, 1.92, and 1.80. Among all the TFTs, the devices using SiN_2.39 exhibited best performance in terms of field-effect mobility, subthreshold slope, and maximum interface state density. SIMS analysis showed that the amount of hydrogen present at the ZnO/insulator interface and in the ZnO channel for the TFT structures using SiN_2.39 is much higher than those in the case of TFTs using SiN_1.80. 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Fortunato, Influence of the semiconductor thickness on the electrical properties of transparent TFTs based on indium zinc oxide, J. Non-Cryst. Solids, vol. 352, no. 9 20, pp. 1749 1752, Jun. 2006. [23] Y. Miao, Z. Ye, W. Xu, F. Chen, X. Zhou, and B. Zhao, p-type conduction in phosphorus-doped ZnO thin films by MOCVD and thermal activation of the dopant, Appl. Surf. Sci., vol. 252, no. 22, pp. 7953 7956, Sep. 2006. [24] S. Y. Myong, S. I. Park, and K. S. Lim, Improvement of electrical stability of polycrystalline ZnO thin films via intentional post-deposition hydrogen doping, Thin Solid Films, vol. 513, no. 1/2, pp. 148 151, Aug. 2006. Kariyadan Remashan received the M.Tech. degree in electrical engineering with specialization in microelectronics from the Indian Institute of Technology (IIT), Bombay, in 1991 and the Ph.D. degree in electrical engineering from the IIT, Madras, India, in 1998. He worked as a Research Staff Member with IIT, Madras, National University of Singapore, Singapore, Nanyang Technological University, Singapore, Santa Clara University, Santa Clara, CA, and National Central University, Taoyuan, Taiwan, R.O.C. Since 2006, he has been with the Department of Information and Communications, Gwangju Institute of Science and Technology, Gwangju, Korea, as a Research Professor. His research interests are in the field of design, fabrication, characterization, and simulation of semiconductor devices based on Si, GaAs, GaN, and ZnO. Dae-Kue Hwang received the B.S. degree in materials and science engineering from the Chonbuk National University, Jeonju, Korea, in 2002 and the M.S. degree in materials science and engineering from the Gwangju Institute of Science and Technology, Gwangju, Korea, in 2004, where he is currently working toward the Ph.D. degree. His research interests include ZnO light-emitting diodes (LEDs), ZnO and GaN heterojunction LEDs, transparent conducting oxide for optoelectronic devices, ZnO photonic crystals, ZnO field-effect transistors (FETs) and ZnO nanowire FETs.

REMASHAN et al.: IMPACT OF HYDROGENATION OF ZnO TFTs 2743 Seong-Ju Park received the B.S. and M.S. degrees in chemistry from Seoul National University, Seoul, Korea, in 1976 and 1979, respectively, and the Ph.D. degree from Cornell University, Ithaca, NY, in 1985. After pursuing his research career with the IBM Watson Research Center, Yorktown Heights, NY and Electronics and Telecommunications Research Institute (ETRI), Daejon, Korea, he has been with the Gwangju Institute of Science and Technology (GIST), Gwangju, Korea, where he founded the Nanophotonic Semiconductors Laboratory in 1995. His current research interests of the laboratory include the following: 1) growth and characterization of GaN and ZnO epitaxial thin films and quantum wells; 2) growth and characterization of quantum dots using GaN ZnO, and Si semiconductors; 3) UV, blue, green, white LEDs using quantum wells and quantum dots; 4) quantum dot optoelectronic/electronic devices; and 5) photonic crystals and surface plasmons for high-efficiency LEDs. Over the past decade, he has reported 248 publications, 421 conference presentations, three books (two books are in press), and 91 patents awarded or pending. Dr. Park is a member of Korean Academy of Science and Technology, and has won numerous awards granted to an outstanding scientist from Korea government, ETRI, Korea Chemical Society, The Korean Federation of Science and Technology Societies, and GIST. He is an Editor of the Japanese Journal of Applied Physics, and has organized many international conferences as a committee member, and also has given a number of invited talks in scientific and industrial fields. Jae-Hyung Jang (M 02) received the B.S. and M.S. degrees in electrical engineering from Seoul National University, Seoul, Korea, in 1993 and 1995, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana Champaign, Urbana, in 2002. He is currently an Assistant Professor with the Center for Distributed Sensor Networks, Department of Information and Communications, Gwangju Institute of Science and Technology (GIST), Gwangju, Korea. His research interests at GIST include the design, fabrication, and characterization of compound semiconductor devices and circuits, including InP high-electron mobility transistors, single-photon detectors, ZnO-based transparent thin-film transistors, and highly efficient solar cells. He is also doing active research works on small antennas based on metamaterials and ring-resonator-coupled devices on silicon on insulator for photonic integrated circuits and integrated biosensors.