Total Ionizing Dose Test Report. No. 18T-RT4G150-LG1657-K04J0
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1 Total Ionizing Dose Test Report No. 18T-RT4G150-LG1657-K04J0 March 27, 2018
2 Table of Contents I. Summary Table...3 II. Total Ionizing Dose (TID) Testing...3 A. Device-Under-Test (DUT) and Irradiation Parameters...3 B. Test Method...4 C. Design and Parametric Measurements...4 III. Test Results...5 A. Functionality...5 B. Power Supply Current...5 C. Single-Ended Input Logic Threshold (VIL/VIH)...19 D. Output-Drive Voltage (VOL/VOH)...19 E. Propagation Delay...26 F. Transition Time...26 Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 2
3 I. SUMMARY TABLE Parameter Tolerance 1. Gross Functionality Passed 125 krad(sio 2 ) 2. Power Supply Current Passed 125 krad(sio 2 ) 3. Input Threshold (VIL/VIH) Passed 125 krad(sio 2 ) 4. Output Drive (VOL/VOH) Passed 125 krad(sio 2 ) 5. Propagation Delay Passed 125 krad(sio 2 ) for 10% degradation criterion 6. Transition Time Passed 125 krad(sio 2 ) II. TOTAL IONIZING DOSE (TID) TESTING This testing is designed on the basis of an extensive database of TID testing for Radiation- Tolerant FPGAs including flash-based FPGAs. Microsemi TID reports can be found at Electrical parameters are measured pre-irradiation and post-irradiation using the burn in design and the Automatic Test Equipment (ATE) program. The report summarizes sample pins. A. Device-Under-Test (DUT) and Irradiation Parameters Table 1 lists the DUT and irradiation parameters. Table. 1. DUT and Irradiation Parameters Part Number RT4G150 Package LG1657 Foundry United Microelectronics Corp. Technology 65 nm DUT Design Burn in design with inverter string Die Lot Number K04J0 Quantity Tested 6 Serial Number (Dose) (125 krad), (125 krad), (125 krad), (125 krad), (125 krad), (125 krad) Radiation Facility Defense Microelectronics Activity Radiation Source Co-60 Dose Rate 5 krad (SiO 2 )/min Irradiation Temperature Room Irradiation and Measurement Bias Static at 1.2V/2.5V/3.3V/3.3V IO Configuration Single ended Differential Pair Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 3
4 B. Test Method 1. Pre-irradiation Electrical Tests 2. Radiate to Specific Dose 3. Post-irradiation Functional Fail Redo Test Using Less Total Dose 4. Done Pass Fig. 1. Parametric test flow chart The test method generally follows the guidelines in the military standard TM1019. Figure 1 shows the flow chart describing the steps for the functional and parametric tests. C. Design and Parametric Measurements RTG4 FPGA devices have different types of I/Os, such as MSIO and MSIOD, double data rate I/Os (DDRIO), and dedicated I/Os based on functional usage. For more information on I/O naming conventions and I/O description, refer to the RTG4 FPGA Pin Description. All I/Os are tested pre and post-irradiation. Fabric functionality coverage performed by the burn in design is summarized in table 2 below. In addition to the fabric coverage the supplemental test of propagation delay is also used to determine DUT functionality. These tests are performed pre and post-irradiation and recorded as a pass/fail. Refer to appendix A for a graphical representation of fabric functional coverage blocks used to perform the functional tests. Table. 2. Fabric Functional Coverage Block Combo Block Register Block UPROM Embedded SRAM Blocks Shift Register Block I/O Block Math Block Coverage combinatorial macros available in the RTG4 library sequential macros available in the RTG4 library Maximum output toggle rate(checker board) compared to reference full toggle coverage on 209 fabric LSRAM & 210 µram blocks using dual port/ two port configurations (x18 width) core utilization I/O utilization full toggle coverage on 462 fabric math blocks with maximum width configuration Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 4
5 The core power supply current IDD, the I/Os power supply currents (IDDI_2.5/IDDI_3.3) and the charge pump and PLL power supply current (IPP_PLL) are also monitored during irradiation in real time. The input logic threshold (VIL/VIH) is measured on all single-ended inputs as well as all differential inputs, and is reported as a pass or fail, as part of the ATE test program. The outputdrive voltage (VOL/VOH) is also measured on all pins on the MSIO MSIOD and DDRIO. This report contains the output-drive voltage measurements on selected IO pins used in the burn in design. LVTTL and LVCMOS 2.5V standard at different sourcing and sinking currents are reported. A 2000 stage inverter string is used to measure the propagation delay. The propagation delay is defined as the time delay from the triggering edge at the Clock input to the switching edge at the output. The propagation delay is monitored real time during irradiation and the time difference between positive switching edges of the clock and output are reported. Additionally, the transition characteristics (rise and fall) at the output of the inverter chain are measured pre and post-irradiation. Oscilloscope screen captures are shown in section III. F. III. TEST RESULTS A. Functionality Every DUT passed the pre-irradiation and post-irradiation functional tests mentioned in section II.C. B. Power Supply Current The core power supply current (IDD) is 1.2 V, the I/O bank power supply currents (IDDI) are 2.5 V (IDDI_2.5) and 3.3 V (IDDI_3.3). The charge pump and PLL power supply current (IPP_PLL) is 3.3 V. Figures 2-25 illustrate the plot of in-flux standby IDD, IDDI_2.5, IDDI_3.3 and IPP_PLL versus total dose for every DUT. Tables 3-6 summarize the pre-irradiation and post-irradiation total current (static & dynamic) IDD, IDDI_2.5, IDDI_3.3 and IPP_PLL. Table. 3. Pre-irradiation and Post-irradiation I DD DUT Total Dose Pre-irradiation Post-irradiation (A) Increase (%) (A) krad krad krad krad krad krad Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 5
6 Table. 4. Pre-irradiation and Post-irradiation I DDI_2.5 DUT Total Dose Pre-irradiation Post-irradiation (A) Increase (%) (A) krad krad krad krad krad krad Table. 5. Pre-irradiation and Post-irradiation I DDI_3.3 DUT Total Dose Pre-irradiation Post-irradiation (A) Increase (%) (A) krad krad krad krad krad krad Table. 6. Pre-irradiation and Post-irradiation I PP_PLL DUT Total Dose Pre-irradiation Post-irradiation (A) Increase (%) (A) krad krad krad krad krad krad The following figures (2-25) show the in-beam monitoring of the currents mentioned above as a function of TID for the available DUTs. Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 6
7 Fig. 2. DUT core power supply current (I DD ) versus TID Fig. 3. DUT core power supply current (I DD ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 7
8 Fig. 4. DUT core power supply current (I DD ) versus TID Fig. 5. DUT core power supply current (I DD ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 8
9 Fig. 6. DUT core power supply current (I DD ) versus TID Fig. 7. DUT core power supply current (I DD ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 9
10 Fig. 8. DUT I/O bank 2.5V power supply current (I DDI_2.5 ) versus TID Fig. 9. DUT I/O bank 2.5V power supply current (I DDI_2.5 ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 10
11 Fig. 10. DUT I/O bank 2.5V power supply current (I DDI_2.5 ) versus TID Fig. 11. DUT I/O bank 2.5V power supply current (I DDI_2.5 ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 11
12 Fig. 12. DUT I/O bank 2.5V power supply current (I DDI_2.5 ) versus TID Fig. 13. DUT I/O bank 2.5V power supply current (I DDI_2.5 ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 12
13 Fig. 14. DUT I/O bank 3.3V power supply current (I DDI_3.3 ) versus TID Fig. 15. DUT I/O bank 3.3V power supply current (I DDI_3.3 ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 13
14 Fig. 16. DUT I/O bank 3.3V power supply current (I DDI_3.3 ) versus TID Fig. 17. DUT I/O bank 3.3V power supply current (I DDI_3.3 ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 14
15 Fig. 18. DUT I/O bank 3.3V power supply current (I DDI_3.3 ) versus TID Fig. 19. DUT I/O bank 3.3V power supply current (I DDI_3.3 ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 15
16 Fig. 20. DUT charge pump and PLL power supply current (I PP_PLL ) versus TID Fig. 21. DUT charge pump and PLL power supply current (I PP_PLL ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 16
17 Fig. 22. DUT charge pump and PLL power supply current (I PP_PLL ) versus TID Fig. 23. DUT charge pump and PLL power supply current (I PP_PLL ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 17
18 Fig. 24. DUT charge pump and PLL power supply current (I PP_PLL ) versus TID Fig. 25. DUT charge pump and PLL power supply current (I PP_PLL ) versus TID Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 18
19 C. Single-Ended Input Logic Threshold (VIL/VIH) The input switching threshold, or trip point, is defined as the applied input voltage at which the output of the design starts to switch. VIH is the input trip point when the input is going high to low and VIL is the input trip point when the input is going low to high. The input logic threshold (VIL/VIH) is measured on all single-ended inputs as well as all differential input and recorded as pass or fail. All I/Os are tested at their respective I/O standards and are compliant to the JEDEC specs. Refer to ds0131-rtg4-fpga-datasheet for more information. The 3 DUTs tested passed with respect to the testing specification pre and post-irradiation. This pass/fail is determined as part of the ATE test program used to perform pre and postirradiation electrical parametric measurements. Table. 7. VIH Summary DUT Pre-irradiation Post-irradiation Passed Passed Passed Passed Passed Passed Passed Passed Passed Passed Passed Passed Table. 8. VIL Summary DUT Pre-irradiation Post-irradiation Passed Passed Passed Passed Passed Passed Passed Passed Passed Passed Passed Passed D. Output-Drive Voltage (VOL/VOH) The pre-irradiation and post-irradiation output-drive voltages (VOL/VOH) are performed on all available IOs. The measurements performed pre and post irradiation are within the specification limits; in each case, the radiation-induced degradation is within 10%. For the purpose of this report, the measurements presented below in tables 9 through 32 are sampled on several pins used in the burn in design. Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 19
20 Table. 9. LVCMOS 25 VOH DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 10. LVCMOS 25 VOH DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 11. LVCMOS 25 VOH DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 12. LVCMOS 25 VOH DUT Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 20
21 2mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 13. LVCMOS 25 VOH DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 14. LVCMOS 25 VOH DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 15. LVCMOS 25 VOL DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 16. LVCMOS 25 VOL DUT Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 21
22 2mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 17. LVCMOS 25 VOL DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 18. LVCMOS 25 VOL DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 19. LVCMOS 25 VOL DUT mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 20. LVCMOS 25 VOL DUT Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 22
23 2mA 4mA 6mA 8mA 12mA 14mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 21. LVTTL VOH DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 22. LVTTL VOH DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 23. LVTTL VOH DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 23
24 Table. 24. LVTTL VOH DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 25. LVTTL VOH DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 26. LVTTL VOH DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 24
25 Table. 27. LVTTL VOL DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 28. LVTTL VOL DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 29. LVTTL VOL DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table. 30. LVTTL VOL DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 25
26 Table. 31. LVTTL VOL DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L E. Propagation Delay Table. 32. LVTTL VOL DUT mA 4mA 8mA 12mA 16mA Pin Name Pin# Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad Pre rad Post rad TID_BUF_OUT A EPCSRST_N_0 B EPCSRST_N_1 B EPCSRST_N_2 B EPCSRST_N_3 B EPCSRST_N_4 B EPCSRST_N_5 B MONITOR K PLL_MON L TOGGLE_MON L Table 33 lists the pre-irradiation and post-irradiation propagation delay measurements. It shows that the change due to radiation on each DUT is not significant and every DUT passes the 10% degradation criterion. Table. 33. Pre-irradiation and Post-irradiation Propagation Delay Change DUT Total Dose Pre-irradiation (µs) Post-irradiation (µs) Change Degradation (%) krad krad krad krad krad krad F. Transition Time The figures below show the pre-irradiation and post-annealing transitions edges. In each case the radiation induced transition degradation is not observable. Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 26
27 Fig. 26 (a). DUT pre-irradiation rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 26 (b). DUT post-annealing rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 27
28 Fig. 27 (a). DUT pre-irradiation rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 27 (b). DUT post-annealing rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 28
29 Fig. 28 (a). DUT pre-irradiation rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 28 (b). DUT post-annealing rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 29
30 Fig. 29 (a). DUT pre-irradiation rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 29 (b). DUT post-annealing rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 30
31 Fig. 30 (a). DUT pre-irradiation rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 30 (b). DUT post-annealing rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 31
32 Fig. 31 (a). DUT pre-irradiation rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 31 (b). DUT post-annealing rising edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 32
33 Fig. 32 (a). DUT pre-irradiation Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 32 (b). DUT post-annealing Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 33
34 Fig. 33 (a). DUT pre-irradiation Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 33 (b). DUT post-annealing Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 34
35 Fig. 34 (a). DUT pre-irradiation Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 34 (b). DUT post-annealing Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 35
36 Fig. 35 (a). DUT pre-irradiation Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 35 (b). DUT post-annealing Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 36
37 Fig. 36 (a). DUT pre-irradiation Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 36 (b). DUT post-annealing Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 37
38 Fig. 37 (a). DUT pre-irradiation Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Fig. 37 (b). DUT post-annealing Falling edge, abscissa scale is 1V/div and ordinate scale is 2ns/div Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 38
39 Appendix A Table. 34. High level block diagrams of blocks used to perform fabric functional coverage pre and post-irradiation Block Combo Block Register Block UPROM Embedded SRAM Blocks Shift Register Block IO Block Math Block Coverage combinatorial macros available in the RTG4 library sequential macros available in the RTG4 library full toggle coverage on 209 fabric LSRAM & 210 µram blocks using dual port/ two port configurations (x18 width) core utilization IO utilization full toggle coverage on 462 fabric math blocks with maximum width configuration Fig. 38. Combo Block Fig. 39. Shift Register Block Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 39
40 Fig. 40. Embedded Ram Blocks Fig. 41. IO Block Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 40
41 Fig. 42. Math Block Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 41
42 Microsemi Corporate Headquarters One Enterprise, Aliso Viejo CA USA Within the USA: +1 (949) Sales: +1 (949) Fax: +1 (949) Microsemi Corporation (NASDAQ: MSCC) offers a comprehensive portfolio of semiconductor solutions for: aerospace, defense and security; enterprise and communications; and industrial and alternative energy markets. Products include high-performance, high-reliability analog and RF devices, mixed signal and RF integrated circuits, customizable SoCs, FPGAs, and complete subsystems. Microsemi is headquartered in Aliso Viejo, Calif. Learn more at Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Total Ionizing Dose Test Report No. 18T RT4G150 LG1657 K04J0 42
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