Studies on ZnO/Si Heterojunction Diode Grown by Atomic Layer Deposition Technique
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1 Copyright 2013 American Scientific Publishers All rights reserved Printed in the United States of America Journal of Nanoelectronics and Optoelectronics Vol. 8, 1 5, 2013 Studies on ZnO/Si Heterojunction Diode Grown by Atomic Layer Deposition Technique Purnima Hazra 1, S. K. Singh 2, and S. Jit 1 1 Department of Electronics Engineering, Indian Institute of Technology (BHU), Varanasi , India 2 Department of Electrical Engineering, Mewar University, Chittorgarh , India In this paper studies on Si/ZnO heterojunction diode is presented. In this work Zinc oxide (ZnO) was conformally deposited on Silicon (Si) Wafer by atomic layer deposition (ALD) technique without using a buffer layer. For low-temperature ALD deposition, diethyl zinc (DEZn) and deionized (DI) water were used as the sources for zinc and oxygen respectively. Surface characterization and optical characterization are done to show the quality of as-grown ZnO film. On top and bottom of the structure titanium/aluminium and aluminium were deposited respectively to get large area ohmic contacts. The junction properties are evaluated by measuring current voltage (I V ) and capacitance voltage (C V ) characteristics. I V characteristics exhibited well defined rectifying behavior with a rectification ratio of 127 and turn-on voltage of 0.6 V. The ideality factor of 2.72 and barrier height of ev are showing the superior quality of the ZnO/Si heterojunction diode without a buffer layer. Keywords: Atomic Layer Deposition, Heterojunction Diode, Photoluminescence Spectra, Diode Characteristics. 1. INTRODUCTION Zinc Oxide (ZnO) is an intrinsically n-type wide bandgap semiconductor with bandgap 3.7 ev at room temperature). 1 It is transparent in the visible wavelength region and has high infrared reflectance in infrared wavelength region. 2 It has very good electrical conductivity. 2 Further, ZnO is a prominent excitonic material (exitonic energy 60 mev) suitable for light emission applications since its bound electron hole pairs have a high radiative recombination probability. 1 Due to its unique properties, ZnO has found extensive applications 1 3 in transparent electronics, photovoltaic technology, biosensors, field emitters, LEDs, solar cells and so on. High quality ZnO thin film can be obtained by different techniques, such as magnetron sputtering, 1 pulsed laser deposition, 3 atomic layer deposition (ALD), 4 10 chemical vapour deposition and sol gel techniques However, it is difficult to point out even one, other than ALD, that is able to combine thickness control over nanometer scale and effectiveness needed for industrial applications. 4 9 In fact, ALD method is gaining attention of researchers now-a-days as this method is favorable for conformal deposition of high quality ZnO thin films with precise thickness and composition control at low deposition Author to whom correspondence should be addressed. temperature. 4 9 Since, the stoichiometry of the films is more controllable compare to other techniques; it is possible to synthesize extremely uniform and defect-free largearea ZnO thin film by ALD technique. 7 Basically, ALD is a self-limiting vapor-phase chemisorption method in which consecutive surface reactions are happened. In this technique, critical purging steps are utilized to prevent interactions between reactive precursors. 9 Since the past few years, many research groups showing their interest to optimize the growth conditions and growth rate of the ALD-grown ZnO films, 4 9 but a very few of them have shown their interest to make device prototype from these types of films. In these studies ZnO is deposited by ALD technique on various substrates including glass, 4 Alumina 5 Silicon nanowire, 6 GAN 7 substrates and even on flexible substrates like polyethylene naphthalate substrates 8 to investigate the device properties. However, to the best of our knowledge there is no such report where ALD-gown ZnO/Si heterojunction device properties are investigated by depositing ZnO directly on Si substrate without using any buffer layer. Although growth of ZnO directly on silicon is difficult to achieve as there is a large lattice mismatching and difference in thermal coefficients 2 between Si and ZnO materials, the Si/ZnO heterojunction devices have great advantages as these devices can be compatible with Si based microelectronic industrial applications. J. Nanoelectron. Optoelectron. 2013, Vol. 8, No X/2013/8/001/005 doi: /jno
2 Studies on ZnO/Si Heterojunction Diode Grown by ALD Technique Hazra et al. In addition, both Si and ZnO materials are low cost, non-toxic and have environment friendly characteristics. 2 3 In the present work, we report the deposition of ZnO thin film on Si substrate by ALD method and subsequent fabrication of large-area Titanium/Aluminium (Ti/Al) contact on front of ZnO film and Al on back side of Si wafer to study the junction characteristics of Si/ZnO heterojunction diode using both current voltage and capacitance voltage method. 2. EXPERIMENTAL DETAILS The ZnO thin film was deposited on a p-si (100) substrate by using the ALD technique. Before deposition 4 inch Si wafer (resistivity 4 7 cm) was cut into small stripes and cleaned using trichloroethylene (10 min), acetone (2 min) and DI water (4 5 times) sequentially. Then the wafers were soaked in H 2 SO 4 (97%)/H 2 O 2 (30%) for 15 minutes, dipped in 2% HF solution (1 min) and finally rinsed thoroughly in DI water (8 10 times) to dry in air. Thoroughly cleaned and dried wafers were then placed in ALD chamber (equipment model TFS 200 from BENEQ). Here diethyl zinc [Zn(C 2 H 5 2, DEZN] and DI water are the precursors which were used as the source of zinc and oxygen respectively to produce ZnO. Pulse duration for both DEZN and DI water was maintained at 100 ms whereas the purging time was set as 1 sec. Nitrogen gas with flow rate of 200 SCCM was used as the carrier gas as well as purging gas. For separating successive pulses of the precursor from each other, the chamber pressure (7 mbar) was maintained much higher than the reactor pressure (1.2 mbar). The substrate temperature was 150 C, whereas the precursor temperature was maintained at 20 C during the deposition of ZnO on the bulk silicon substrate. The thickness of ZnO film was measured about 100 nm after 500 cycles of deposition. After deposition of ZnO, samples were gone through rapid thermal annealing procedure at 550 C for 20 minutes, as post-deposition heat treatments are necessary in ZnO fabrication to ensure the continuous film surface with fewer interstitial defects and also to passivate the top surface. 12 The surface morphology of the film was analyzed by atomic force microscopy (AFM) on contact mode and X-ray diffraction spectra (Bruker D8 Advance XRD). To show room temperature optical properties of the film, photoluminescence (PL) spectroscopy with a laser source of 325 nm wavelength was carried out. Then to make device prototype 20 nm titanium and 80 nm aluminium (Ti/Al) was deposited one-by-one on top of the ZnO film by thermal evaporation method through shadow mask technique to form large area ohmic contact with 1 mm diameter. Here Ti is used for better contact stability. 17 On the bottom of the Si wafer, a layer of Aluminium (Al) was deposited to make bottom ohmic contact. In order to improve the quality of the electrodes, the film was annealed in RTA (Rapid thermal annealing) Fig. 1. Schematic diagram of ZnO/Si heterojunction diode. furnace for 10 min at 450 C in nitrogen environment. The schematic diagram of Al/Ti/ZnO/Si/Al thin film heterojunction diode is shown in Figure 1. Finally, the device characterization was done at room temperature. Current voltage measurement was done using semiconductor parameter analyzer (model B1500A, Hewlett- Packard) and capacitance voltage measurement was done using LCR meter (4284A, HP). 3. RESULTS AND DISCUSSION 3.1. Characterization of ZnO Film AFM 3D images of ZnO thin film with the scan size of 1 m 1 m are recorded after several scans as shown in Figure 2. The scan rate of AFM is set to be at 1 Hz. AFM microscopic image confirms the presence of ZnO nanocrystals in the ZnO thin film. The image also demonstrates the uniformity of the deposition over the whole sample. The XRD pattern of the as-grown ZnO thin film is shown in Figure 3. It shows that the film is polycrystalline in nature with hexagonal wurtzite type crystal structure. 13 All the peaks of the ZnO thin film correspond to the peaks of standard ZnO crystals (JCPDS ). The preferred Fig. 2. (a) 3D AFM image of as-grown ZnO thin film. 2 J. Nanoelectron. Optoelectron. 8, 1 5, 2013
3 Hazra et al. Studies on ZnO/Si Heterojunction Diode Grown by ALD Technique (b) highest emission has taken place) is almost near to the theoretical direct band gap ( 3.4 ev) of ZnO. Further, the emissions from other types of defects (for example, the green band emission due to the oxygen vacancy in ZnO film at 550 nm) are not observed. 18 The above characteristics indicate that the as-grown ZnO film is almost free from defects with good optical properties which can be applicable for fabricating strong UV optoelectronic device applications as well as anti-reflection coating in Si solar cells Device Characterization Fig. 3. XRD spectra of as-grown ZnO thin film. growth orientation is in (101) direction. The crystallite size (D) of the film is estimated by using the Scherer formula: 13 D = k (1) cos where k is a constant approximated as 0.94, is the wavelength of X-ray used ( = 1 54 Å), is the full width at half maximum (FWHM) of a peak as shown in XRD pattern and is called Bragg s angle. The average value of grain size is found to be The average value of grain size is found to be 67 nm. Figure 4 shows the PL spectroscopy of the Si/ZnO thin film heterostructure at room temperature. Only a strong near-band-edge emission peak at 377 nm due to the donor acceptor pair transitions is observed in the spectrum. Notably, the band-edge wavelength (377 nm) (at which the Figure 5 shows the current voltage (I V ) characteristics of the ZnO/Si thin film heterojunction diode measured at room temperature. The I V characteristics show a typical p n junction behavior with the rectifying junction. The rectification ratio is obtained typically 127 at ± 2 V. The relationship between junction current and applied voltage for an heterojunction diode is defined as: 14 I = I 0 e qv /nkt 1 (2) Where, q is electronic charge, k is Boltzmann s constant, I 0 is reverse saturation current, T is absolute temperature and is the ideality factor that measures the conformity of the diode to the ideal characteristics. Here and I 0 are calculated from ln(i) versus V plot and they are estimated to be 2.72 and A respectively. Further, the turn-on voltage is calculated from current voltage characteristics as 0.6 V. Moreover, effective barrier height ( bh ), one of the important performance parameter for a heterojunction diode is also derived from the I V characteristics measured at room temperature. It can be theoretically expressed as 19 I 0 T = AA T 2 exp bh /kt (3) Fig. 4. Photoluminescence spectra of as-grown ZnO thin film. Fig. 5. Semilog plot of current voltage characteristics of ZnO/Si thin film heterojunction diode. J. Nanoelectron. Optoelectron. 8, 1 5,
4 Studies on ZnO/Si Heterojunction Diode Grown by ALD Technique Hazra et al. The result indicates that the ZnO/Si junction is having high quality. 16 The intercept of the characteristics with the voltage axis at C 2 = 0 gives built-in potential V bi = 0 8 V and the slope of the plot gives the average carrier concentration N D = cm 3. The barrier height c can also be calculated from capacitance voltage characteristics using built-in potential and the relationship is given as: 3 Where c = V d0 + kt q ln ( NC N D V d0 = V bi + kt q ) (6) (7) Fig. 6. Capacitance voltage characteristics of ZnO/Si thin film heterojunction diode. Where, A and A are the contact area and Richardson constant respectively. The effective barrier height for Si/ZnO heterojunction is calculated as ev. The better values of the performance parameters like ideality factor, barrier height and turn on voltage in the proposed device as compared to the previously reported values demonstrate the higher quality of our ZnO/Si heterojunction diode compared to the devices prepared by other methods The C V technique is one of the most popular and convenient methods to study the semiconductor characteristics like barrier height, carrier concentration and doping profile etc. Figure 6 shows the room-temperature capacitance voltage (C V ) measurement at the ZnO/Si heterojunction diode conducted at 1 MHz. It can be seen clearly from the figure that at low voltage region, the capacitance of the heterojunction diode is decreased sharply with the increase of reverse bias voltage and it is increased with the increase in forward bias voltage. This phenomenon demonstrates that the sample has an obvious space charge region. The capacitance of the depletion region can be explained by the conventional heterojunction theory as given below: 3 C 2 qn = A N D 1 2 (4) 2 1 N A + 2 N D V Bi V Where N D is the charge carrier concentration (donor density) in n-zno, N A is the acceptor density in p-si, 1 and 2 are the dielectric constants of Si and ZnO, V bi is the built in potential and V is the applied bias voltage. The depletion layer capacitance per area for an applied reverse voltage in terms of the semiconductor permittivity s can be described as: 3 A 2 C = 2 V bi V (5) 2 q s N D The inset of Figure 6 shows an approximate linear C 2 V relationship in the reverse bias condition. Here N c = cm 3 is taken as the density of states in conduction band of ZnO at room for effective mass of electron m e = 0 27m 0. The barrier height of ZnO/Si heterojunction calculated as c = 1 09 ev at room temperature. Ideally, The barrier height obtained from the capacitance voltage measurements ( c is almost same as that measured using the current voltage measurements ( bh ), but in our proposed device c is slightly higher than bh. It may be happened due to the presence of surface impurities or due to the effects of the image force and barrier inhomogeneities. 4. CONCLUSION Investigation on Si/ZnO heterojunction diode prepared by ALD technique is reported here. The uniform and nanocrystalline surface morphology is demonstrated by AFM and XRD characterizations. Single peak band-edge emission peak confirms the good quality of as as-gown ZnO films. The rectification ratio of 127 at ± 2 V and ideality factor of 2.72 demonstrates that a high quality non-ideal rectifying contact is formed between Silicon and ZnO. Approximate linear C 2 V relationship in the reverse bias condition further indicates that the ZnO/Si heterostructures prepared by the ALD process are good enough to be used in electrical devices. Hence the proposed heterojunction diodes have potential to be used in present day s Si based nanoelectronic and optoelectronic industrial applications. Acknowledgments: The authors are deeply thankful to Dr. Pankaj Mishra and his group in Laser Materials Processing Division, DAE-RRCAT, Indore for availing facilities to complete a part of the above project. Authors are also thankful to UGC-DAE CSR Centre, Indore for availing some of the characterization facilities. References and Notes 1. P. Chen, X. Ma, and D. Yang, J. Appl. Phys. 101, (2007). 2. C. Periasamy and P. Chakrabarti, J. Vac. Sci. Technol. B 29, (2011). 4 J. Nanoelectron. Optoelectron. 8, 1 5, 2013
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