Algorithms for Design-Automation - Mastering Nanoelectronic Systems Logic Diagnosis with improved resolution
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1 Algorithms for Design-Automation - Mastering Nanoelectronic Systems Presenter: Alejandro Cook
2 Slide 2
3 Overview Logic diagnosis DIAGNOSIX: A diagnosis methodology Discussion Summary
4 Logic Diagnosis Slide 4 Input patterns Ouput responses F(x1,x3,x3, )
5 Diagnosis approaches Slide 5 Cause-effect analysis relies on a fault model computes possible faulty responses builds a fault dictionary Effect-cause analysis is based on deductive reasoning no fault dictionary required more suited for multiple faults analysis
6 Overview Logic diagnosis DIAGNOSIX: A diagnosis methodology Discussion Summary
7 DIAGNOSIX Slide 7 Uses an effect-cause approach Considers the physical distance between lines Performs both fault localization and identification Extracts a fault model to accurately characterize defect behavior
8 DIAGNOSIX: definitions Slide 8 Neighborhood of a line: layout information
9 DIAGNOSIX: definitions Neighborhood of a line: netlist information The neighborhood of S 9: S 7 and S 10, the drivers of S 9 : S 3 and S 8, the drivers of S 7 : S 1 and S 2, and the drivers of S 10 : S 8, S 5 Slide 9
10 DIAGNOSIX: Methodology overview Slide 10
11 Stage One: Fault localization Slide 11 Goal: Indentify signal lines that may be responible for the observed erroneous behavior Steps: Build the input cone of the faulty primary output Initial set of lines contains all possible faulty lines Reduce the number of lines: per-test diagnosis passing pattern validation
12 Stage One: Per-test diagnosis (I) Slide 12 Finds a set of temporary stuck-at lines (TSL) faulty defined as (l,v,t) l : line v: stuck-at value pattern set this fault explains uses single-location-at-a-time (SLAT) patterns patterns for which the defect behavior can be explained by a single fault location Lack of SLAT patterns is a problem
13 Slide 13 Stage One: Per-test diagnosis (II) Per-test diagnosis flow
14 Stage One: Results of per-test diagnosis (I) Slide 14 The resulting TSL's are ranked A cover forest is constructed T 1 T 2 T1 T 3 Equivalent faults need to be removed to improve resolution
15 Stage One: Passing pattern validation Slide 15 Uses passing parameters to further refine the set of TSL a passing pattern cannot excite a fault and sensitize a path to the output Procedure: Check the neighborhood state of each TSL Check the neighborhood state created by the passing patterns Discard TSL if both states are identical
16 DIAGNOSIX: Methodology overview Slide 16
17 Stage Two: Behavior identification Slide 17 Builds macrofaults by extracting a fault model from the reduced cover forest Uses a truth table with the neighborhood states of the lines in the cover Procedure: Search cover forest and identify a set of faulty lines Extract excitation condition from the selected TSL's and their neighborhood conditions The combinations of TSL's may be very large
18 DIAGNOSIX: Methodology overview Slide 18
19 Stage Three: Behavior validation Slide 19 uses all available patterns to validate the macrofaults discards macrofaults with contradicting behavior measures the accuracy of the extracted fault model may require ATPG to improve accuracy
20 Overview Logic diagnosis DIAGNOSIX: a diagnosis methodology Discussion Summary
21 Slide 21 Discussion Three independent experiments: Fault injection by simulation, yielding 35 circuits Five real chips with available PFA results 830 failing chips without PFA results Reduction of candidate lines by 93% in per-test diagnosis and by 54% in PPV. Candidate macrofaults identified for most injected circuits The macrofault list could not be refined for many injected circuits
22 Discussion Slide 22 Front-of-the-line (FEOL) and back-of-the-line (BEOL) defects were correctly identified Applicability Precision diagnosis: guides PFA Statistical analysis in volume diagnosis Able to model many real defects Problems with multiple stuck lines
23 Overview Logic diagnosis DIAGNOSIX: a diagnosis methodology Discussion Summary
24 Slide 24 Summary DIAGNOSIX is a diagnosis methodology for precision diagnosis of random logic The methodology refines the number of candidate faulty lines and extracts a consistent defect behavior The methodology provides good localization and identification results The diagnosis results are strongly dependent on the set of test patterns
25 Slide 25 Thank you
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