56:134 Process Engineering

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1 56:134 Process Engineering Homework #2 Solutions Your role as a process analyst is to reduce cycle time of the process in Figure 1. The duration of each activity is as follows: Release PCB1 2 minutes Release PCB2 4 minutes Test PCB1 25 minutes Test PCB2 30 minutes Test 1 7 minutes Test 2 9 minutes 1

2 Draw a Gantt chart of the process activities when: (1) Logical junctions a, b, and c and (exclusive OR) junctions (2) Logical junctions a and b are (exclusive OR) junctions, and junction c is a synchronous AND junction. (3) Explain the impact of controls on the Gantt schedule. Release PCB 1 Release PCB 2 Test PCB 1 a b c Test PCB 2 Test 1 results Test 2 results Figure 1. IDEF3 model of a testing process. 2

3 Solution (1) (2) (3) (4) Release PCB 1 Release PCB 2 Test PCB 1 a b c Test PCB 2 Test 1 results (5) Test 2 results (6) The activity number assigned IDEF3 model (1) Possible input-output cases Activity Case 1 Case 2 Case 3 Case 4 Case

4 Gantt Chart - Part 1 Process Case 5 Case 4 Case 3 Case 2 Case Time Note: Release PCB1 Release PCB2 Test PCB1 Test PCB2 Test 2 Test 1 In Case 4, it was assumed the control of Test PCB 1 acts as an input. Release PCB 1 Release PCB 2 Test a b c Test PCB 1 PCB 2 Alternative solution Test 1 results Test 2 results Gantt Chart - Part Activity PCB 1 PCB 2 1 Activity 1, Time = 2 Activity 2, Time = 4 2 Activity 3, Time = 25 Activity 4, Time = 30 3 Activity 5, Time = 7 Activity 6, Time = 9 Note: Process 2 1 PCB2 PCB1 PCB1 and PCB2 processed in Parallel time We can also choose the above path, which will give rise to another alternative solution. This solution will process PCB1 and PCB2 in parallel. 4

5 (2) Activity Case 6 Case 7 Case Note: In case 8, it the control of Test PCB 1 was assumed to act as an input. 3 Gantt Chart - Part 2 Release PCB1 Release PCB2 Test PCB1 Test PCB2 Test 1 Test 2 Process time Note: In case 8, it the control of Test PCB 1 was assumed to act as an input. 5

6 3 Gantt Chart - Part 2 Release PCB1 Release PCB2 Test PCB1 Test PCB2 Test 2 Process 2 1 Test 2 done in parallel with Test PCB2 Test 2 done in parallel with Test PCB time Note: Alternative solution In case 8, it the control of Test PCB 1 was assumed to act as an input. Test 2 done in parallel with Test PCB2 (3) The controls to each individual activity (as in controls, mechanisms, input and output) are assumed to act as control path that can be taken (for example, from (exclusive OR) junction at A to Test PCB 1) and thus the destination activity can then occur without input (which is therefore not coming from (exclusive OR) junction at B). Control path can be used to proceed further Release PCB 1 Release PCB 2 Test PCB 1 a b c Test PCB 2 Test 1 results Test 2 results 6

7 If controls to this problem are to be interpreted as the junctions, they do affect the Gantt schedule. When junction C is an junction, it is possible to go from Testing PCB1 to finish in 7 minutes by proceeding to analyze Test 1 only. If C is a synchronous AND, Test PCB2 and analysis of this test must occur as well, resulting in a minimum finishing time of 39 minutes after completing Testing of PCB1. For the IDEF3 process model in Figure 2: (1) Set-up an output-input incidence matrix (2) Apply the triangularization algorithm to the matrix created in (1) and arrange activities and cycles into levels. Assume that the duration of each activity is 2 days. Knowing that a process model represents the space of all possible decision paths: (3)Draw a Gantt chart of the shortest path through the model. 7

8 O Figure 2. IDEF3 model of an industrial process Solution Assumption: (1)Since the problem requires an output-input matrix, all of the links that are controls are eliminated, leaving only inputs and outputs. (2)Activity 1 and 2 are integrated O

9 Levels 2 + Level 1 3 * + Level 2 4 * + Level 3 5 * + 6 * + Level 4 7 * + 8 * + 9 * + Level 5 10 * * + 4 * + 6 * + 9 * + Level 1 Level 2 Level 3 Level 4 Level 5 There is no cycle found in this case O

10 * + 4 * + 5 * + 8 * + There is a control which forms cycle. This potentially may delay the activity O Level 1 Level 2 Level 3 Level 4 Level * + 4 * + 7 * + 10 * + Level 1 Level 2 Level 3 Level 4 Level 5 There is a self cycle at activity 7. This may cause potentially infinite delay O

11 The possible shortest path: Gantt Chart Case 1 ( ) Time in days Activity 2 Activity 3 Activity 4 Activity 6 Activity 9 Total time = 5 x 2(days) = 10 (days) 11

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