Accelerated Bit Error Rate Measurement Technique for Gigabit Link Power Optimization

Transcription

1 Acclratd Bit Error Rat Masurmnt Tchniqu for Gigabit Link Powr Optimization Joshua I Kramr, Fouad Kiamilv Univrsity of Dlawar 140 Evans Hall Nwark, DE jkramr@.udl.du, kiamilv@udl.du Abstract With th nd for dcrasd powr consumption as link spds hav incrasd in this papr w propos a mthod of powr saving using bit rror rat (BER) masurmnt of th link. As of now, only wirlss links hav usd BER as a mtric for powr optimization bcaus th rror rat for wird links is 5-10 ordrs of magnitud lowr thus rquiring a vry long tim to complt a BER masurmnt. An improvd acclratd BER tchniqu is usd to bring th masurmnt tim down to a managabl lvl. Th acclratd tchniqu is compard to xisting mthods in trms of as of applicability to currnt low powr link tchnology such as a currnt-sns low-swing architctur. For short haul intrconncts, low-swing links ar bcoming a viabl rplacmnt for LVDS or CML. Th currnt mod opration of low-swing links is wll suitd for applying th powr saving mthodology. Th prsntd low-swing architctur nabls fastr spds and lowr powr consumption ovr its prdcssor. Exprimntal rsults ar shown for th powr optimization mthodology applid to th currnt-sns diffrntial low swing link. I. INTRODUCTION Highspd intrconncts ar no longr th domain of fixd structurs such as srvr mothrboards and ntwork dvics. Mobil systms such as cllular phons, GPS rcivrs, and portabl gaming dvics hav pushd for mor multimdia intgration and biggr highr dfinition displays [1]. This incrass componnt and signal count which rducs th alrady small amount of availabl board spac. Highspd srialization is usd to dcras th numbr of tracs that nd to b routd [1, ]. Th spac saving coms at th cost of incrasd powr consumption from th srial intrconnct. Intrconnct powr optimization has takn th form of both link architctur improvmnts [3-7] and dynamic in situ mthodologis [8-10]. It is obvious that combining ths forms can furthr improv powr savings. An architctur that has a good potntial for bttr powr optimization ar low-swing currnt-sns rcivrs. Voltag-sns low-swing links, such as LpLVDS, ar limitd by thir rcivr offst voltag. Th voltag swing sn at th rcivr is ultimatly dtrmind by th transmission lin trmination rsistor, which is typically 50Ω. This puts a practical limit on th currnt swing from th transmittr and thrfor a limit in achivabl powr savings. A currnt-sns rcivr is not limitd by th voltag swing gnratd by th trmination rsistor and thus can us an vn lowr signal lvl with th corrsponding powr and EMI rduction. To tak advantag of this capability it is ncssary to dtrmin how far th signal swing can b rducd bfor nois bcoms a problm. Th bit rror rat (BER) for th link, which is dirctly rlatd to th signal to nois ratio, is a suitabl mtric to dtrmin th appropriat signal lvl. Whil it has bn applid to wirlss links [11], thus far no work has bn don using BER to dynamically optimiz th powr on wird links. A rason for this may b that sinc th nvironmnt for a wird link is typically bttr compard to a wirlss link, th BER rquirmnts ar tightr and thus masurmnt of th BER would tak too long to b usful. For xampl, multi-gigabit srial data links rquir rror rats around or smallr, which for a 10 Gb/s link, givs about on bit rror pr day. A wirlss link on th othr hand has a BER rquirmnt of 10-6 or vn highr. To apply BER masurmnt to a wird link rquirs th us of acclratd masurmnt tchniqus [1-16]. Th availabl tchniqus for acclratd BER masurmnt modify th nois powr to incras th rror rat. This has th dual disadvantag of dtrmining th BER for a fixd signal powr and rquirs th addition of circuitry which only purpos is to add nois. This papr prsnts both an improvd acclratd BER masurmnt tchniqu for lctrical links and an improvd low swing currnt-sns rcivr. Th sinusoidal intrfrnc mthod for acclratd BER tsting is modifid such that th signal powr is th adjustd valu to incras th rror rat. This rmovs th nd for spcializd circuitry for injcting nois and rlis instad on adjusting th transmittr powr which is not an unrasonabl fatur to hav in a powr awar dvic.

2 Additionally, our mthod calculats th signal powr for a rang of BER valus. Th nois modification mthods would rquir itrating th signal powr to dtrmin th valu ndd for a particular BER rquirmnt. This mthodology is applid to an improvd currnt-sns rcivr. Prvious dsign of this rcivr wr singl ndd which rducd nois immunity. Th prsntd dsign combins th currnt-sns rcivr and diffrntial signaling to incras nois immunity and thus allow lowr swings and lowr powr consumption whil also incrasing oprating spd. This papr is organizd as follows. In sction II BER masurmnt on an lctrical link with Gaussian nois is discussd. Sction III dscribs xisting mthods of acclratd BER tsting. Sction IV prsnts our proposd improvmnt to th sinusoidal intrfrnc mthod. Th hardwar implmntation of th improvd currnt-sns rcivr is discussd in Sction V. Th xprimntal stup componnts and rsults ar prsntd in Sction VI. II. BIT ERROR RATE MEASUREMENT A. Bit Errors and Error Rat Masurmnt Signals ar distortd along thir path du to imprfctnss of dvics and nois ffcts. In crtain instancs th additiv nois ffct can bcom larg nough to affct th corrct rcption of th transmittd data. Th nois can b considrd ithr indpndnt from or proportional to th transmittd signal. Crosstalk, rflctions, and slf-inducd powr supply nois ar som xampls of nois that ar signal dpndant. Dcisions mad at dsign tim will affct how srious this typ of nois will b in th systm. Crtain tchniqus, which may b difficult to implmnt, can mitigat or rmov ths sourcs of nois [17-19]. Nois sourcs that ar indpndnt of th signal lvl includ thrmal and shot nois, input offst, transmittr offst, and unrlatd powr supply nois. Carful dsign of th circuits can rduc th affct of som of th indpndnt sourcs, such as thos causd by input offst and th powr supply. Som nois is a rsult of th physical proprtis of th systm so that for all practical purposs it can not b rmovd by vn th most carful of dsigns and a nois floor occurs in th systm that must b takn into account. Rgardlss th typ of nois affcting th signal, th xistnc of nois givs ris to th link mtric of bit rror rat (BER). Th BER is th most important masur of a data links prformanc. This valu dfind as N BER B t0 whr, N is th numbr of bit rrors masurd, B is th data rat, and t 0 is th total tim intrval for th masurmnt. This valu is usd as an approximation for th probability of rror, P(), for th link. Th mor bits rcivd, thus longr t 0 intrvals, will giv bttr stimats; around 10/P() bits givs a 95% confidnc intrval [13]. Th most accurat masurmnts of th BER ar prformd by transmitting a known psudorandom data squnc on th link and rcording rrors by comparing th rcivd valus with th snt valus[13]. Although this mthod is accurat, it rquirs a significant amount of tim spcially whn th BER to b masurd is vry low. For xampl, a BER of masurd on a 1 Gb/s link will tak ovr 115 days for 95% confidnc. Tchniqus for acclratd BER tsting[1-16, 0], including th on proposd in this papr, ar hnc rquird for fast and ffctiv BER masurmnts. Nxt a rviw of th thory of th BER on an lctrical link is prsntd. B. Probability of Error for an Elctrical (1) A basic lctrical communication link consists of a transmittr, a transmission mdium, and a rcivr. Nois can b gnratd at any of ths thr parts. What is important is th total nois sn at th rcivr. This can com from many sourcs that can b ithr dpndant on or indpndnt from th signal powr. Th thrmal nois prsnts a physically dfind bottom limit for th nois in th systm. Th som of most of th non-gaussian nois sourcs can b approximatd as Gaussian for practical systms [16]. If th nois is, or can b rasonably approximatd as, Gaussian thn th rror probability is P P(0) P(1 0) P(1) P(0 1) P(0) Q( U ) P(1) Q(( S U) ) 0 1, () whr P(0) and P(1) ar rspctivly th probability that a 0 or a 1 symbol is transmittd, P(1 0) and P(0 1) ar th conditional probabilitis of rciving on symbol givn that th othr is snt, U is th thrshold lvl for th dcision circuit, S is th amplitud of th signal for a 1 symbol, th nois standard dviations corrsponding to th stats 0 and 1 ar σ 0 and σ 1 rspctivly and Q(X) is th complmntary Gaussian probability function: x 1 1 X Q( X ) dx rfc, (3) X

3 whr rfc( ) is th complmntary rror function. In lctrical links th nois is i.i.d., which mans 0 1 [14]. It is also assumd that th symbols for 0 and 1 ar indpndnt and qually probabl, which givs an optimal thrshold of U0 S. Thrfor, th rror probability, or BER, is xprssd as whr D S 1 D P rfc (4). From (4) w can s that th rror probability is dirctly and only rlatd to th signal to nois ratio (SNR) of th link. This is an important obsrvation that is xploitd by th tchniqus for acclrating th BER masurmnt. III. REVIEW OF METHODS FOR MEASURING LOW BER Whil having a both fast and accurat masurmnt of th rror rat on a link would b idal, on must b sacrificd for th othr. Dpnding on th application, on aspct will b mor important than th othr. Whn th link is not in us a long wait tim is not a problm. Howvr, fast masurmnts ar rquird if th ral-tim prformanc of th link is dsird. Such masurmnts can b usd to monitor th halth of channl so that rplacmnts of faulty links ar timly prformd. Also, as will b dscribd latr, fast masurmnts can b usd to dynamically optimiz th link powr. Various mthods of quickly approximating th BER hav bn dvlopd. Acclratd BER masurmnt mthods hav thr basic faturs: 1. Dgradation of th link SNR to incras th rror rat ovr th normal oprating rat.. A mans of masuring this modifid rror rat for diffrnt dgrs of link dgradation. 3. A mthod of xtrapolating ths masurmnts to approximat th non-dgradd rat. Dscribd nxt ar two tchniqus that diffr on how th xtrapolation is prformd to approximat th non-dgradd rror rat as wll as how th signal is dgradd. A. Psudo-rror Gnration On of th arlir forms of acclratd BER masurmnt was with th us of psudo-rror monitors[1]. Instad of dirctly masuring th input signal, on or mor paths with a controlld dgradation of th signal ar usd. A diagram of this mthod is shown in figur 1. Signal Rcivr Data Rcovry 1 N Modifid Data Rcovry Modifid Data Rcovry Modifid Data Rcovry Countr Countr Countr Extrapolator Estimat of BER Figur 1: Psudo-rror monitor On mthod of xtrapolation is if th logarithm of th psudo-rror rat, Pp(), is tratd as a linar function of an appropriatly dfind dgradation paramtr thn an xtrapolation to th tru rror rat P() can b prformd[0]. For two valus of dgradation K 1 and K, th P() of th link can b found by th linar xtrapolation, K log Pp K1 K1 log Pp K log P. (5) K K 1 Bttr approximations of P() can b achivd by using mor valus and highr ordr curv fitting. Dgradation of th signal can b achivd through various mans, including thrshold modification, timing offst, and nois injction. Som of th mthods for artificially dgrading th signal in psudo-rror monitors ar also usd in latr dvlopd tchniqus for acclratd BER.

4 B. Sinusoidal Intrfrnc and rfc Approximation A dtrministic sin-wav with random phas can injctd into th rcivd signal of a data link to gnrat th psudorrors for xtrapolating th stimatd BER[13, 16]. In actual application a sin-wav with a frquncy that is a non-intgr multipl or submultipl of th bit rat will simulat a sinusoidal intrfrnc with random phas. Th uppr bound of th psudo-rror rat, Pp(), is[13] max 1 D 0 D 1 Pp rfc rfc, (6) 4 whr, D is th sam as in (4), 0 Asin 0 and 1 A sin 1, and A sin is th amplitud of th sin-wav intrfrnc. This can b approximatd as max 1 D Pp rfc. (7) Th rfc can b approximatd as rfc x c1 x cx c3, (8) whr th cofficints c 1, c, and c 3, ar 0.496, 0.498, rspctivly. This givs th following linar rlation btwn th psudo-rror rat and th amplitud of th sin wav[13]: P D 1 3 c c 4c c ln P c 1. (9) A straight lin fit of th P masurmnts can b xtrapolatd to zro sinusoidal intrfrnc for th approximat valu of D. From this fit, th approximat BER for th link can b calculatd. IV. PROPOSED METHOD OF ACCELERATED BER MEASUREMENT Our proposd mthod is not mant to tak away from th prviously dscribd mthods, but instad offrs an improvmnt that would b bttr suitd for actual application in a systm. It can b sn as th dual of th sinusoidal mthod as prsntd abov. Whil it may sm an obvious conclusion whn looking at (9) that signal attnuation will allow for acclratd BER masurmnt, no work has yt implmntd that cas. Nxt w prsnt th advantags of our tchniqu, th drivation from (4) to achiv th linar rlation to th signal powr, and th mthodology itslf. A. Advantags Our proposd mthod builds on th sinusoidal intrfrnc tchniqu dscribd prviously. Whras that mthod dpnds on th dgradation of th SNR by incrasing th nois, no on has yt dscribd a mthodology that uss modifying th transmittd powr to dgrad th signal. Th proposd tchniqu dos just that. Adjusting th transmittr powr instad of adding nois to th signal has a two-fold advantag. Firstly, to add nois rquirs additionally circuitry whos only purpos is to dgrad th signal whil th circuitry to chang th transmittr currnt is typically built in for th additional purpos of powr saving. Scondly, sinc th xtrapolation in our mthod is don basd on th transmittr powr, th approximat BER for a rang of powr sttings can b calculatd as opposd to th othr mthod which givs it for a rang of nois powr. Thrfor, our mthod is wll suitd for stting th powr basd on a changing quality rquirmnt. B. Drivation for Transmittr Signal Dgradation Th rsult (9) drivd abov can also b achivd if th nois is assumd to b constant and th signal powr is what is adjustd. From (4) w can rprsnt th probability of rror as 1 1 ( S ) P rfc, (10) whr is th attnuation of th signal powr. Using th sam approximation for th complimntary rror function as in (8) rsults in P S 1 3 c c 4c c ln P c 1. (11)

5 BER 10 0 Rlation of BER to (BER) (BER) Figur : Graphical rlation of ψ to th BER Figur shows (11) ovr a typical rang of BER that would b ncountrd. Equation (11) is similar to (9) xcpt now th nois powr is assumd to b constant whil th signal powr is adjustd. This xprssion varis linarly with th amount of attnuation applid to th signal. C. Tsting Mthodology Using th rsult (11) w prsnt a tsting mthodology for optimizing th transmittr powr basd on th approximatd valu of th link BER. Th stps ar similar as in [16] with th major chang bing th transmittr powr that is adjustd instad of th nois. Ths stps ar as follows: 1. St th transmittr powr to th point that th channl BER is about 10-4, as this is th uppr limit for th rfc( ) approximation.. Stp up th transmittr powr and sav th BER valu at ach stp. 3. Calculat th P for ach data point. 4. Fit a lin through th data points. 5. Solv for th transmittr powr stting to provid th dsird BER valu. V. HARDWARE IMPLEMENTATION To vrify our acclratd BER masurmnt mthodology w chos a low-swing link intrfac. Whil th mthodology is applicabl to typical intrfacs, a low-swing intrconnct is bttr suitd for th ovrall goal of powr optimization. In mobil applications, dvic sizs ar smallr and accordingly th chip to chip link lngths ar shortr. Whr LVDS or CML is applicabl to long lin lngths in noisy nvironmnts, low-swing architcturs ar wll suitd for th short lngth lins. Rducing th signal swing had th addd bnfit of dcrasing th EMI ffcts from th link. Prsntd nxt is a proposd low-swing rcivr architctur that improvs on prvious dsigns to oprat at highr spds. An IC was dsignd that implmntd this architctur. A tst systm was cratd that intgratd this IC with a BER masurmnt dvic to vrify our proposd acclratd BER tsting mthodology. A. Proposd Low Swing Rcivr Architctur Figur 3 shows th basic concpt for on sid of th diffrntial low swing rcivr. Th two important componnts in this dsign ar th bipolar transistor in th common bas amplifir (CBA) configuration and th amplifir connctd to th bas of th transistor. Th CBA has low input impdanc and high output impdanc, thus functioning as an impdanc transformr. This ffctivly dcoupls th transmission lin trmination rsistor and th currnt to voltag convrsion rsistor. Although th input impdanc of th CBA is low, it is still on th ordr of 50 Ω. Sinc w can mor accuratly trminat th lin with a sparat rsistor, an amplifir is connctd to th bas of th transistor to rduc th input impdanc of th CBA such that th trmination rsistor dominats th input impdanc of th rcivr. A low spd, singl-ndd dsign in GaAs tchnology was implmntd by Long and Zhang [5] that opratd at 1.Gb/s. Our proposd architctur is dsignd in 0.35 µm AMS SiG tchnology that implmnts on chip transmission lin trmination and diffrntial input to incras th opration bandwidth to 10 Gb/s.

6 Vo -A Zo Figur 3. Low swing rcivr connctd to a transmission lin with charactristic impdanc Zo 00mV 0V -00mV SEL>> 0mV v(vbp)-v(vbm) Figur 4. Simulatd y diagram of rcivr output at 10Gb/s Th diffrntial rcivr and transmittr circuits usd in th tst IC ar shown in figur 5 and figur 6 rspctivly. Th transmittr uss lin-to-lin trmination and has a tail currnt, I TX, which is programmabl. In a bipolar CBA th input impdanc sn at th mittr is dfind as Vt I c. V t is approximatly 6 mv at room tmpratur and I c is th collctor 0V currnt. In our implmntation th collctor currnt is 500 µa, which givs a 130 Ω input impdanc. Th diffrntial pair fdback amplifir connctd to th bas of th transistors rducs th input impdanc by 1 A whr A is th gain of th amplifir. Th amplifir has a dsignd gain of 0, thrfor bringing th input impdanc down to around 6.5 Ω. Th mittr rsistors ar st to th 50 Ω trmination -0mV impdanc of th transmission lins. Th 500 Ω collctor rsistors convrt th currnt to voltag lvls usabl by on-chip logic. This rcivr implmntation uss 1. mw of powr on a.4 V supply. Th 3 db -100p -50p 0 50p 100p point occurs at 10 GHz and th frquncy v(vap) rspons - v(vam) for this rcivr is shown in figur 7. y_swp(00p,0) Figur 5. Proposd diffrntial low swing rcivr

7 Volts db 100Ω V in + V in - I TX Figur 6. Diffrntial low swing transmittr Frquncy (Hz) Figur 7. Frquncy rspons of th proposd rcivr B. Advantags Ovr Othr Rcivrs CML and LVDS ar typically usd for high-spd chip to chip links. Both ar currnt mod transmittrs but us voltag mod rcivrs. As mntiond bfor, ths typs of rcivrs rquir a minimum transmittr powr that provids a voltag on this rsistor which is far nough abov th nois floor to b dtctd. Incrasing th rsistor valu would incras th charactristic impdanc of th transmission lin which will rquir largr spacing for th diffrntial PCB tracs. Dpnding on th application this additional spac may not b possibl. Additionally, 50 Ω is th standard impdanc usd in industry for tst quipmnt and using diffrnt impdanc can mak accurat tsting mor difficult. Th improvd currnt mod rcivr can kp th transmission lin charactristic impdanc at a standard 50 Ω whil using a largr rsistor, around 500 Ω, to provid gratr currnt-to-voltag convrsion. CML and LVDS links hav a typical powr consumption of around 30mW. Sinc th improvd rcivr can us lss transmittr currnt for th sam output voltag for th sam charactristic impdanc transmission lin th ovrall powr consumption is only 4.mW. VI. EXPERIMENTAL RESULTS A. Tst Componnts Th purpos of this tst systm is to masur th BER of two typs of lctrical links using our acclratd tchniqu. Th systm block diagram is shown in figur 8. Th tst stup includs a PCB with two ASICs and an Anritsu digital data analyzr was to gnrat th psudorandom data and calculat th raw BER masurmnts. Th Anritsu is capabl of outputting a diffrntial signal with a pak to pak valus from 500 mv to V in 10 mv stps at up to 3. Gb/s. Th rcivr for th BER masurmnt is capabl of oprating at 3.GHz with pak to pak inputs from 500 mv to 4 V. Labviw was usd with a logic analyzr to program th rgistrs on th ASICs which controlld th transmittr powr stting.

8 Logic Analyzr and Labviw PCB Tst Platform ASIC I 100mm ASIC Anritsu Bit Error Rat Tstr Figur 8: Block diagram of th tsting systm Figur 9: PCB tst platform 1) ASIC and PCB Th PCB tst platform with th wirbondd ASICs is shown in figur 9. Th custom ASIC was implmntd in th 0.35µm AMS SiG procss with 65 Ghz ft. Thr wr a total of six channls implmntd. Half of th channls wr dsignd for th proposd low-swing architctur and th othr half for CML channls. Simulations wr run on ach channl with th post-layout xtractd parasitic capacitancs includd. Ths rsults showd that th proposd links could oprat at spds up to 10 Gb/s. An FR-4 PCB was dsignd to provid two mods of tsting. On sid was dsignd for tsting on ASIC whil th othr sid was configurd to connct two ASIC with 100 mm long diffrntial 50 Ω microstrip transmission lins. Th intrfac to th channls implmnting th proposd architctur is in CML so as to b compatibl with th tst quipmnt. Th bias currnts for th transmittrs and rcivrs ar controlld by on-chip 5-bit DACs. Labviw is usd to control a shift rgistr chain which program th DACs and slcts which channl to powr on. Only on channl is run at a tim so crosstalk affcts ar not obsrvd. B. Tst Procdur Th transmittr bias currnt was rducd to purposly dgrad th link SNR. Th Anritsu was st to produc a PRBS pattrn of 7-1 with a clock frquncy of.5ghz. At last 100 rrors wr rcordd for ach BER masurmnt to b confidnt in th accuracy. Th transmittr currnt for th channl was lowrd until a BER was masurd that was at last Th DAC stting for this valu is rcordd and thn incrasd by on bit. Th BER is masurd again and is rcordd with

9 th currnt DAC stting. This procss is itratd at last four tims to provid a good linar fit to xtrapolat th BER according to (7). Th P valus wr calculatd and a plot of ths vrsus th currnt is mad. C. Rsults A tst IC, figur 10, was implmntd that containd a channl with th low swing rcivr. Two ICs wr placd on th tst board and th transmittr was connctd to th rcivr by a 100 mm transmission lin ovr FR-4. A BER tst was prformd on th link running at.5 Gb/s with 800 µa transmittr tail currnt. A combination of tst quipmnt limitations and board dsign limitd th tst to only.5 Gb/s vn though th link is dsignd for 10Gb/s opration. Th rcivr was configurd as th on as shown in figur 3, with a.4 V supply and 0.5 ma tail currnt for th fdback amplifir. No rrors occurrd aftr running th link for ovr 4 hours. Thrfor, th BER for th link with a transmittr currnt of 800 µa is at last 4x Th y diagram of th rcivr output is shown in figur 11. Figur 10: 0.35 µm AMS SiG Tst IC Figur 11: Masurd y diagram of rcivr output running at.5 Gb/s and 800 µa of tail currnt

10 ψ(p) Starting with 00 µa of transmittr tail currnt and stpping by 50 µa, four valus for P wr calculatd. Ths valus with a linar fit of th points ar shown in figur 1. As can b sn, th xprimntal rsults confirm thr is a linar rlation btwn th transmittr powr and P. It is thn straightforward to calculat th ncssary currnt to achiv a dsird bit rror rat Transmittr currnt (µa) 0 Figur 1: Plot of P vrsus th transmittr currnt. A linar fit is usd to xtrapolat th transmittr currnt ncssary for a rquird BER valu VII. CONCLUSION A nw mthodology for powr optimization basd on acclratd BER masurmnt was prsntd. An improvd acclratd bit rror rat algorithm for lctrical link basd on signal strngth attnuation was drivd basd on th sinusoidal intrfrnc mthod. Sinc currnt-sns rcivrs can provid smallr signal swings than voltag sns rcivrs, this mthodology was applid to an improvd currnt-sns rcivr. Th rcivr was improvd ovr th prvious gnration in both spd and nois immunity by using diffrntial instad of singl ndd logic. W implmntd this rcivr on an IC and cratd a tst systm to both validat th rcivr dsign and th acclratd BER masurmnt. Exprimntal rsults show that th rcivr prformd as xpctd up to th limit of our tst quipmnt. Additionally, our improvd powr saving mthodology was also shown to work undr ral world oprating conditions. REFERENCES [1] W. Ly, "Emrging cllular phon display srds and thir EMI footprint," prsntd at Intrnational Confrnc on Consumr Elctronics, 006. [] P. Nol, F. Zarkshvari, and T. Kwasniwski, "Rcnt advancs in high-spd srial I/O trnds, standards and tchniqus," 005. [3] "Mobil Pixl Link," in National Smiconductor, 003. [4] M. Chn, J. Silva-Martinz, M. Nix, and M. E. Robinson, "Low-Voltag Low-Powr LVDS Drivrs," IEEE Journal of Solid-Stat Circuits, vol. 40, pp , 005. [5] S. I. Long and J. Q. Zhang, "Low Powr GaAs Currnt-Mod 1. Gb/s Intrchip Intrconnctions," IEEE Journal of Solid-Stat Circuits, vol. 3, pp , [6] L. Luo, J. M. Wilson, S. E. Mick, J. Xu, L. Zhang, and P. D. Franzon, "3Gb/s AC-Coupld Chip-to-Chip Communication using a Low-Swing Puls Rcivr," in IEEE Intrnational Solid-Stat Circuits Confrnc, 005. [7] K.-L. J. Wong, H. Hatamkhani, M. Mansuri, and C.-K. K. Yang, "A 7-mW 3.6-Gb/s I/O Transcivr," IEEE Journal of Solid-Stat Circuits, vol. 39, pp , 004. [8] E. J. Kim, G. M. Link, K. H. Yum, N. Vijaykrishnan, M. Kandmir, M. J. Irwin, and C. R. Das, "A holistic approach to dsigning nrgy-fficint clustr intrconncts," Computrs, IEEE Transactions on, vol. 54, pp , 005.

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