Analog Design and System Integration Lab. Graduate Institute of Electronics Engineering National Taiwan University

Transcription

1 Designs of Low-Noise K-band K VCO Analog Design and System Integration Lab. Graduate Institute of Electronics Engineering National Taiwan University

2 Introduction Outlines The proposed VCO architecture Circuit Design Simulation Result Conclusion 2

3 Introduction Outlines The proposed VCO architecture Circuit Design Simulation Result Conclusion 3

4 Applications in K-Band K Frequencies K-band frequency range: 18~26 GHz. In 2002, FCC opens GHz for vehicular radar systems. 24 GHz is an industrial, scientific and medical (ISM) band. Some emerging MIMO system uses K bands for small-size antennas [1]. L S C X Ku K Ka U Frequency (GHz) 60 Vehicular Radar MIMO System 4

5 Implementation of K-Band K Systems Conventionally, K-band systems are realized in III-V groups. With recent advances in CMOS process, it becomes feasible to use MOS devices to fabricate K-band circuits. The high-volume integration of CMOS process is also beneficial to RF SoC for K-band applications. 180 Frequency (GHz) f t f max CMOS Process Generation (nm) 350 5

6 Challenges of K-Band K Circuits in CMOS The K-band system usually requires high performance in gain, noise figure, etc. The inherent characteristics (g m, R g, C gs0, ) of MOS devices leads to degraded circuit performance. The restricted f t, f max and NF min have impeded the development of K-band CMOS circuits. Single finger RF MOS transistor [11] Expression of f t, f max and NF min [12] 6

7 Challenges of K-Band K Circuits in CMOS Most modern CMOS technologies use a heavily-doped p+ substrate [13]. However, the low resistivity of the substrate (on the order of 0.1 Ω cm) results in Limited Q-factor of inductors in high frequencies. Substrate noise coupling. Ground bounce. Cross-section views of inductor [14] 7

8 The Proposed Project Designs of low-noise 19-GHz VCO for K-band systems. To suppress the phase noise (PN) of VCO, the modified Gm-boost technique is adopted. Model: Virtual 0.18-µm CMOS provided by CIC. Simulation Tools: Advance Design System (ADS) 2004A. LO2_I+ LO2_Q+ LO2_I- LO2_Q- 8

9 Introduction Outlines The proposed VCO architecture Circuit Design Simulation Result Conclusion 9

10 VCO Designs for Wireless Systems VCO: Voltage-Controlled Oscillators Design issue Phase Noise: impacts receiver sensitivity performance Tuning range: needs to cover all frequency channels Output power: influences the conversion gain of mixers DC power: expects low power dissipation Popular VCO structures LC oscillator: low phase noise, bulky area Ring oscillator: high phase noise, small area 10

11 Review of LC VCO architectures Negative Gm: Simple, differential phase, low dc power. Colpitts: Low phase noise, single phase, high output power level, high dc power (stringent startup condition),. Hertley: Same as Colpitts, but not popular in IC implementations. Colpitts Hertley 11

12 Review of Low-Phase Phase-Noise LC VCO Filtering techniques [15] Using LC filter to suppress the even-order noise (especially at 2ω 0 ) from the current source, leading to low-phase-noise performance. Such technique can be applied to negative-gm and Colpitts LC VCO. In Colpitts VCO, due to single phase, noise filter is designed at ω 0. Top-biased VCO with noise filter Colpitts VCO with noise filter 12

13 Review of Low-Phase Phase-Noise LC VCO (Cont ) Noise-shifting technique [16] Based on the differential Colpitts architecture. By using the NMOS switching pairs, the VCO takes full advantage of the cyclostationary noise shaping of the core transistors. The NMOS switching pairs can also enhance the small-signal loop, leading to the improving startup condition. 13

14 Review of Low-Phase Phase-Noise LC VCO (Cont ) Gm-boost technique [17] With the out-of-phase signals at the gate and source terminals, the effective Gm is boosted. The faster switching of M 1 and M 2 can obtain the cyclostationary noise shaping, leading to low-phase-noise performance. The noise can be further reduced in cooperation with noiseshifting technique. Gm-boost VCO Gm-boost VCO with noise-shifting technique 14

15 The Proposed VCO Topology Based on the Gm-boost VCO, the filtering technique is introduced in this design for further reducing phase noise. In the propose topology, a single current source is required, and the noise is intrinsically reduced compared with the conventional Gmboost VCO. V DD L 1 L 1 V ctrl V o C var C var V o M 1 M 2 C 1 C 1 I bias I bias C 2 C 2 Conventional Gm-boost VCO 15

16 The Proposed VCO Topology The proposed VCO also possesses the cyclostationary noise characteristic as the noise-shaping VCO [16]. Due to the Gm-boost technique, the output power level is boosted. The Gm-boost also alleviates the startup condition, resulting in low dc power dissipation. V DD 4 L 1 V ctrl L 1 3 B V o M 1 L 2 L 2 M 2 C 1 C 1 A C 2 C 2 V B C var C var Noise at 2 C par V o ts(a), V ts(b), V Gm Boost time, psec Waveforms at points A and B 16

17 Introduction Outlines The proposed VCO architecture Circuit Design Simulation Result Conclusion 17

18 The Design of the Proposed VCO The model of Virtual 0.18-µm CMOS provided by CIC is utilized in the circuit design. Based on the proposed VCO architecture, a 19-GHz low-phase-noise VCO is developed. For the high-q purpose, spiral-type inductors are adopted. The final designed values and Q-factors of the inductors L 1 and L 2 are shown below. 3.2E E E L2 L1 2.6E-10 Q1 Q E E freq, GHz freq, GHz 18

19 The Design of the Proposed VCO The I-mode varactor is employed in this work. The I-mode varactor possesses the higher Q-factor and wider tuning range compared with the conventional one [18]. The ratio of (C 2 /C 1 ) is critical in the proposed VCO, and is finally determined as 6.25 from the tradeoff between phase noise and tuning range Tuning Range (MHz) MHz (dbc/hz) C 2 /C 1 (pf/pf)

20 Design values of the Proposed VCO The design values of the proposed VCO is provided in the following. In order to drive the 50-Ohm load provided by the spectrum analyzer, an open-drain buffer is also included in the circuit simulation. The effect of the bonding wire is also considered in this work. 20

21 Introduction Outlines The proposed VCO architecture Circuit Design Simulation Result Conclusion 21

22 Simulation Result of the Proposed VCO Operated at a supply voltage of 1.8 V, the dc power is 18 mw. The phase noise is around -118 dbc/ 1MHz offset. The tuning range is from to GHz (550 MHz). The output power is around 0 dbm. freq[1], GHz HB.vc pnmx dbm(var("out+")[::,1]) HB.vc vc 22

23 Performance Summary 23

24 Introduction Outlines The proposed VCO architecture Circuit Design Simulation Result Conclusion 24

25 Conclusion With the advance of CMOS process, it becomes possible to use MOS devices to fabricate K-band circuits. The intrinsic characteristics of CMOS technologies have impeded the development of low-noise K-band systems. In this work, with the proposed modified Gm-boost technique, the lownoise K-band VCO can be realized in 0.18-µm CMOS. Since the filter technique and noise-shifting effect are involved, the noise can be reduced. With the Gm-boost technique, the proposed VCO initiates the oscillation with the low dc power while maintaining high output power level. The simulation results indicate that the phase noise of MHz is obtained as the oscillation frequency is 18.63~19.18 GHz and output power level is around 0 dbm. 25

26 Reference [1] X. Guan, H. Hashemi and A. Hajimiri, A fully integrated 24-GHz eight-element phase-array receiver in silicon, IEEE JSSC, vol. 39, no. 12, pp , Dec [2] K.-W. Yu and et al., K-band low-noise amplifiers using 0.18-µm CMOS technology, IEEE MWCL, vol. 14, no. 3, pp , Mar [3] S.-C. Shin and et al., A 24-GHz 3.9-dB NF low-noise amplifier using 0.18-µm CMOS technology, IEEE MWCL, vol. 15, no. 7, pp , July [4] A. Komijani, A. Natarajan and A. Hajimiri, A 24-GHz, dBm fully integrated power amplifier in 0.18-µm CMOS, IEEE JSSC, vol. 40, no. 9, pp , Sept [5] M. Hossain, B. M. Frank and Y. M. Antar, Performance of a low voltage high linearity 24-GHz down conversion mixer in 0.18-µm CMOS, IEEE SiRF, pp , Jan [6] H.-H. Hsieh and L.-H. Lu, A low-phase-noise K-band CMOS VCO, IEEE MWCL, vol. 16, no. 10, pp , Oct [7] X. Guan and A. Hajimiri, A 24-GHz CMOS front-end, IEEE JSSC, vol. 39, no. 2, pp , Feb [8] A. Natarajan, A. Komijani and A. Hajimiri, A fully integrated 24-GHz phase-array transmitter in CMOS, IEEE JSSC, vol. 40, no. 12, pp , Dec [9] A. W. L. Ng and et al., A 1-V 24-GHz 17.5-mW phase-locked loop in a 0.18-µm CMOS process, IEEE JSSC, vol. 41, no. 6, pp , June [10] C. Cao and et al., A 24-GHz transmitter with an on-chip antenna in 130-nm CMOS, IEEE Symposium on VLSI Circuits, pp , June [11] C. Enz, MOS transistor modeling for RF integrated circuit design, IEEE CICC, pp , May

27 Reference [12] P. H. Woerlee an et al., RF-CMOS performance trends, IEEE Transactions on Electron Devices, vol. 48, no. 8, pp , Aug [13] B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw Hill, [14] M. Kang, J. Gil and H. Shin, A simple parameter extraction method of spiral on-chip inductors, IEEE Transactions on Electron Devices, vol. 52, no. 9, pp , Sept [15] E. Hegazi, H. Sjoland and A. A. Abidi, A filtering technique to lower LC oscillator phase noise, IEEE JSSC, vol. 36, no. 12, pp , Dec [16] R. Aparicio and A. Hajimiri, A noise-shifting differential Colpitts VCO, IEEE JSSC, vol. 37, no. 12, pp , Dec [17] X. Li, S. Shekhar and D. J. Allstot, Gm-boosted common-gate LNA and differential Colpitts VO/QVCO in 0.18-µm CMOS, IEEE JSSC, vol. 40, no. 12, pp , Dec [18] P. Andreani and S. Mattisson, On the use of MOS varactors in RF VCO s, IEEE JSSC, vol. 35, no. 6, pp , June [19] S. Ko and et al., 20 GHz integrated CMOS frequency sources with a quadrature VCO using transformers, IEEE RFIC Symposium, pp , June [20] G. Le Grand de Mercey, A 18GHz rotary traveling wave VCO in CMOS with I/Q outputs, IEEE ESSCC, pp , Sept [21] K. Ettinger and et al., Single-chip 19 and 24-GHz VCO and frequency divider fabricated in a commercial SiGe bipolar technology, IEEE European Microwave Conference, pp. 1-4, Oct

28 3021 Contribution of Each Group Member Paper survey Simulation Report 3029 Paper survey Simulation Report 3086 Paper survey Simulation Report 28