Comparative Analysis of Voltage Controlled Oscillator using CMOS

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1 Indian Journal of Science and Technology, Vol 9(14), DOI: /ijst/2016/v9i14/84749, April 2016 ISSN (Print) : ISSN (Online) : Comparative Analysis of Voltage Controlled Oscillator using CMOS Sajotra Deepak*, Dhariwal Sandeep and Mishra Ravi Shankar School of Electronics and Electrical Engineering, Lovely Professional University, Jalandhar-Delhi G.T. Road, National Highway 1, Phagwara , Punjab, India; sajotra.deepak@outlook.com Abstract Objective: This research paper presents a review on performance comparison of different types of Voltage Controlled Oscillators to analyze power dissipation and frequency response. Methods: Designs from Ring Oscillator, Current Starved VCO, VCO with gates of PMOS transistors grounded, VCO with PMOS transistors as diode connected load, VCO with Source voltage applied to both PMOS and NMOS transistors and VCO with NMOS transistors as diode connected load are designed on 45nm CMOS Technology using Cadence Virtuoso Tool. Findings: The performance of different circuits as Transient response, Frequency Response, Stability, Power has been comparatively analyzed through different simulations. Current Starved VCO is concluded as most linear design. All design procedures, Circuit and simulation results are illustrated. Keywords: Current Starved VCO, Cadence Virtuoso, 45nm CMOS Technology, NMOS Transistors as Diode Connected Load, PMOS Transistors Grounded, PMOS Transistors as Diode Connected Load, Source Voltage on PMOS and NMOS Transistors 1. Introduction In VLSI design domain the selection of a linear andwide range voltage controlled oscillator for various RF, Biomedical 1, Clock recovery circuits and other applicationsis always a challenging work for Electronics Engineers. An oscillator is an electrical autonomous system which generatesa periodic oscillating frequency signal depending on its input voltage 2. VCO is the main component in themany RF circuits and is the heart of Phase Lock Loop system, Clock recovery circuit and Frequency Integrated circuits, so it is very vital to select the suitable VCO design. Frequency, amplitude and noise level should be controlled for many of the applications 7. Oscillators can be divided into two categories; Firstly, the LC oscillator which is composed of the active devices, coupled with LC resonant circuit. Secondly, the loop ringoscillator which is composed of delayed cascade units witha positive feedback. The important requirements of VCO are High gain, wide tuning range, low power consumption and high signal to noise ratio 2,6. The design of a Voltage Controlled Oscillator involves many tradeoffs between area, speed, power, and application domains. These problems and a comparative study of differentring oscillator designs is midst interest in this paper. The performance of different circuits has been comparatively analyzed through simulation results in 45nm CMOS Technology using Cadence Virtuoso. 2. Architectures of VCO A VCO can be implemented through various architectures depending upon different requirements of a VCO like High gain, wide tuning range, low power consumption and high signal to noise ratio and other etc. constrains. Controlled oscillations through VCO can be generated using following architectures: 2.1 LC VCO In this type of architecture active devices, coupled with LC resonant circuits are used. High frequency oscillations *Author for correspondence

2 Comparative Analysis of Voltage Controlled Oscillator using CMOS are generated using inductors and capacitors. Oscillating Sinusoidal wave is observed as output. This architecture is preferred where area and power are not constrains, as RL circuits can be bulky and more power consuming VCOs using Ring Oscillator It is a cascaded feedback connection of odd number of inverters. The output of first inverter is input for second and in same fashion the output of last as input to first inverter as shown in Figure 1. The circuit forms and voltage feedback loop and thus does not have a stable operating point. The DC operating point at which the input and output of all the cascades inverters is equal to threshold voltage Vth is unstable and Table 1. values for Ring Oscillator VCO. Inverters 3 Vpwl [mv/ns] 0,1,1 16.7E-6 any disturbance in the node voltages deviates the circuit from the unstable operating point, Vth 5. After selecting the appropriate values for the parameters, the transient analysis of the ring oscillator is simulated as shown in Figure 2. Figure 1. Schematics of Ring Oscillator VCO. Figure 2. Transient analysis Waveform of Ring Oscillator VCO. 2 Indian Journal of Science and Technology

Sajotra Deepak, Dhariwal Sandeep and Mishra Ravi Shankar Figure 3. Frequency Histogram of Ring Oscillator VCO. Frequency Histogram of Ring Oscillator VCO is shown in Figure 3.

3 Sajotra Deepak, Dhariwal Sandeep and Mishra Ravi Shankar Figure 3. Frequency Histogram of Ring Oscillator VCO. Frequency Histogram of Ring Oscillator VCO is shown in Figure 3. Further the following designs are derived using Ring Oscillators: VCO with Gates Terminals of PMOS Transistors Grounded. VCO with PMOS Transistors diode Connected Load. VCO with NMOS Transistors diode Connected Load. Current Starved Ring VCO 4 Figure 4. Schematics of Current Starved Ring VCO. Indian Journal of Science and Technology 3

Comparative Analysis of Voltage Controlled Oscillator using CMOS Inverters 5 2.3 Current Starved Ring VCO Vpwl [mv/ns] 0,1,1 Table 2. VCO. 1.

4 Comparative Analysis of Voltage Controlled Oscillator using CMOS Inverters Current Starved Ring VCO Vpwl [mv/ns] 0,1,1 Table 2. VCO E-6 values for Current Starved Ring It is a type of Ring VCO in which one additional PMOS and NMOS transistors are used with the basic cascaded feedback connection of odd number of inverters as shown in Figure 4. These PMOS and NMOS act as current sources. These transistors limit the current available to connected inverter and the circuit is starved for current. The circuit works by controlling the charging and discharging of gate capacitance of next inverter. Starving circuit decreases the peak available charging current, increasing the time to charge and discharge time gate capacitance of the inverters; hence the frequency is decreased 1. The drain currents are same and are set by the input control voltage. There are total 22 transistors in total where upper PMOS transistors are connected to gate of another PMOS and input source voltage is applied to gates of all the lower NMOS transistors. The current from these transistors are mirrored in each inverter 3. The transient analysis of the Current Starved RingVCO is simulated as shown in Figure 5. Frequency Histogram of Ring Oscillator VCO is shown in Figure 6. Figure 5. Transient analysis Waveform of Current Starved Ring VCO. Figure 6. Frequency Histogram of Current Starved Ring VCO. 4 Indian Journal of Science and Technology

5 Sajotra Deepak, Dhariwal Sandeep and Mishra Ravi Shankar 2.4 VCO with Gate Terminal of PMOS Transistors Grounded In this type of Ring VCO the Gate Terminal of PMOS transistors are grounded. Doing this will make all of the PMOS transistors ON as all the gate terminals are connected to ground. Thus PMOS transistors gives strong 1 and act as resistor. The schematic is made using odd number of inverters with a positive feedback as shown in Figure 7. The transient analysis of the above schematics is shown in Figure 8. In this a Pulse Signal is given as the initial noiseor pulse for VCO circuit. Inverters 5 Vpwl [mv/ns] 0,1.1, E-6 Table 3. values for VCO with Gate Terminal of PMOS Transistors Grounded. Figure 7. Schematics of VCO with Gate Terminal of PMOS Transistors Grounded. Figure 8. Transient analysis Waveform of VCO with Gate Terminal of PMOS Transistors Grounded. Indian Journal of Science and Technology 5

Comparative Analysis of Voltage Controlled Oscillator using CMOS Figure 9. Frequency Histogram of VCO with Gate Terminal of PMOS Transistors Grounded.

6 Comparative Analysis of Voltage Controlled Oscillator using CMOS Figure 9. Frequency Histogram of VCO with Gate Terminal of PMOS Transistors Grounded. Frequency Histogram of Ring Oscillator VCO is shown in Figure VCO with PMOS Transistor Diode Connected Load In this type of VCO the Gate terminal of PMOS transistoris connected to its Drain terminal and the Gate terminal of lower NMOS is given the V in as shown in Figure Table 4. Inverters 5 Vpwl [mv/ns] 0,1,1 values for VCO with PMOS transistor diode connected load E-6 This PMOS configuration is acting like a 2 terminal device Diode rather than a PMOS as Gate and Drain terminals are shorted. Body bias effect will not be considered in both PMOS and NMOS as the respective Source terminals are connected to VDD and Ground. PMOS transistor as Diode connected load configuration also provides a resistance and will act as resister in this circuit giving an advantage over manufacturing a high cost resistance. The transient analysis of the circuit which is simulated for time period of 100ns giving a pulse or noise signal as the initial state in the feedback circuit as shown in Figure 11. Frequency Histogram of Ring Oscillator VCO is shown in Figure VCO with NMOS Transistor Diode Connected Load In this type of VCO the Gate terminal of lower NMOS transistor is connected to its Drain terminal and the Gate terminal of upper NMOS is given the V in shown in Figure This design of NMOS transistor as Diode connected load configuration provides low frequency response then PMOS as diode load, so designer can choose the appropriate design required. The transient analysis of the circuit which is simulated for time period of 100ns and a positive feedback is given incircuit as shown in Figure 14. Table 5. values for VCO with NMOS transistor diode connected load. Inverters 5 Vpwl [mv/ns] 0,1, E-6 6 Indian Journal of Science and Technology

7 Sajotra Deepak, Dhariwal Sandeep and Mishra Ravi Shankar Figure 10. Schematics of VCO with PMOS transistor diode connected load. Figure 11. Transient analysis Waveform of VCO with PMOS transistor diode connected load. Indian Journal of Science and Technology 7

Schematics of VCO with NMOS transistor diode connected load. Figure 14.

8 Comparative Analysis of Voltage Controlled Oscillator using CMOS Figure 12. Frequency Histogram of Ring VCO with PMOS transistor diode connected load. Figure 13. Schematics of VCO with NMOS transistor diode connected load. Figure 14. Transient analysis Waveform of VCO with NMOS transistor diode connected load. 8 Indian Journal of Science and Technology

9 Sajotra Deepak, Dhariwal Sandeep and Mishra Ravi Shankar Figure 15. Frequency Histogram of VCO with NMOS transistor diode connected load. Frequency Histogram of VCO with NMOS transistor diode connected load VCO is shown in Figure Conclusion As a conclusion of this comparative study we can compare the diverse parameters of different types of VCOs. In NMOS as diode connected load the oscillations provided are low in amplitude and are having large noise. Frequency is observed tobe lowest in case of Ring Starved. If we use a capacitor in parallel to the output of every inverter the transient response may improve depending upon the value of capacitor but may increase the overall capacitance of the circuit. Depending upon required parameters many biomedical applications canbe concluded in coming future. 4. Acknowledgement I would like to thank the Lovely Professional University for providing us the required facilities and Cadence Tool. 5. References 1. Reddy, Pattanaik and Rajput SS. 0.4V CMOS based Low Power Voltage Controlled Ring Oscillator for Medical Applications, ABV-Indian Institute of Information Technology and Management Morena Link Road, Gwalior , India. TENCON IEEE Region 10 Conference Kulkarni and Hosur. Design of a Linear and Wide Range Current Starved Voltage Controlled Oscillator for PLL. International Journal on Cybernetics & Informatics (IJCI) Khurana and Kumar. Performance Analysis of CMOS Based Ring VCOs. International Journal of Engineering Technology, Management and Applied Sciences Patil, Nasre. A Performance Comparison of Current Starved VCO and Source Coupled VCO for PLL in 0.18 µm CMOS Process. International Journal of Engineering Technology, Management and Applied Sciences. ISSN: , International Journal of Engineering and Innovative Technology (IJEIT). 5. Shizhen, Wei, Yutong, Li. Design of A Voltage-controlled Ring Oscillator Based on MOS Capacitance. Proceedings of the International MultiConference of Engineers and Computer Scientists Saxena, Srikanth, Jawale, and Sakthivel. Efficient VCO using FinFET. Indian Journal of Science and Technology. 2015; 8(S2): Khan, Bimal, Dev, KK and Roy. A simple methodology for sinusoidal oscillator design based on simulation of differential equation using AD844 configured as secondgeneration current conveyor. Indian Journal of Science and Technology. 2010; 3(6): Indian Journal of Science and Technology 9

Texas A&M University Electrical Engineering Department. ELEN 665 RF Communication Circuits Laboratory Fall 2010

Texas A&M University Electrical Engineering Department ELEN 665 RF Communication Circuits Laboratory Fall 2010 Laboratory #6: Analysis and Simulation of a CMOS VCO Objectives: To learn the use of periodic