ECE 2300 Digital Logic & Computer Organization
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1 ECE 23 Digital Logic & Computer Organization Spring 27 Combinational Logic Minimization Lecture 3:
2 Announcements Lab 2 is on CMS Tutorial B: CAD tool installation HW will be released tonight Rescheduled lecture: Monday Feb 7:5pm, Kimball B ece23-staff@csl.cornell.edu asap if you have a conflict Lecture 3: 2
3 Review: Consensus Theorem Consensus (T) X Y+X Z+Y Z = X Y+X Z Proof X Y + X Z + Y Z = X Y + X Z + Y Z (X+X ) = X Y + X Z + Y Z X + Y Z X = X Y + X Z + (X Y) Z + (X Z) Y = X Y + X Z + (X Z) Y = X Y + X Z (combining) (distributivity) (commutativity associativity) (covering) (covering) Lecture 3:
4 Boolean Function Representations Y = if and only if A B (B +C) Step : Lay out the truth table Step 2: Derive canonical forms Canonical sum Y = A B C + A B C + A B C + A B C + A B C + A B C = A,B,C (,,3,4,5,6) Canonical product Y = (A+B +C)(A +B +C ) = A,B,C (2,7) ABC Y Step 3: Simplification (this lecture) Lecture 3: 4
5 Exercise Canonical sum & product forms for basic operators NOT, AND, OR A Y A B Y A B Y Canonical sum Y = A Y = AB Y = A B+AB +AB Canonical product Y = A Y = (A+B)(A+B )(A +B) Y = A+B Lecture 3: 5
6 NAND Logic Gate X Y (X Y) = NAND Using De Morgan s Law: (X Y) = X +Y X X X +Y = Y Y Also a NAND We can build circuits from NAND only! Lecture 3: 6
7 We Can Build Circuits from NAND Only! NOT AND OR Lecture 3: 7
8 NOR Logic Gate X Y X+Y (X+Y) = NOR Using De Morgan s Law: (X+Y) = X Y X X X Y = Y Y Also a NOR We can build circuits from NOR only! Lecture 3: 8
9 Combinational Logic Outputs depend only on current inputs Example: Detect if the input is an odd number Can be represented in two-level or multi-level forms In contrast, sequential logic has memory or state Example: Detect if the last two inputs are odd We ll cover sequential logic later Lecture 3: 9
10 Two-Level Logic: Sum-of-Products Sum of product terms (SOP) e.g., A B + A C + A B C Circuits look something like this wire inputs output AND-OR Lecture 3:
11 Two-Level Logic: Product-of-Sums Product of sum terms (POS) e.g., (A +C ) (B +C ) (A+B+C) Circuits look something like this OR-AND Combinational logic can be expressed as SOP or POS Lecture 3:
12 Multi-Level Logic Start from the inputs Derive intermediate outputs Carry through to the circuit output Multi-level logic is typically more compact (i.e., cost-efficient) Lecture 3: 2
13 Algebraic Simplification Apply theorems to canonical sum (product) to reduce () the number of terms, and (2) the number of literals in each term Results in a more compact expression and lower cost digital logic implementation We focus on minimizing two-level logic in this lecture Lecture 3: 3
14 Lecture 3: 4 A B Cin Cout S Cout = A' B Cin + A B' Cin + A B Cin' + A B Cin S = A' B' Cin + A' B Cin' + A B' Cin' + A B Cin Cout S Cin B A Cout S Cin B A S Cin B A S Cin B A Algebraic Simplification Example Binary adder inputs: A, B, Carry-in (Cin) outputs: Sum, Carry-out (Cout) Truth Table à Canonical sum Cout
15 Algebraic Simplification Example Cout = A' B Cin + A B' Cin + A B Cin' + A B Cin = A' B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin (idempotency) = B Cin + A B' Cin + A B Cin' + A B Cin (combining) = B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin (idempotency) = B Cin + A Cin + A B Cin' + A B Cin (combining) = B Cin + A Cin + A B (combining) We can apply these theorems in a more intuitive fashion using a Karnaugh Map Lecture 3: 5
16 Reduction in Hardware Cost Cout = A' B Cin + A B' Cin + A B Cin' + A B Cin = B Cin + A Cin + A B 3 inverters 4 three-input ANDs four-input OR à 3 two-input ANDs three-input OR Lecture 3: 6
17 Karnaugh Map (K-Map) Idea: Use combining and idempotency theorems visually to simplify canonical forms (into twolevel SOP or POS) Multidimensional representation of a truth table Adjacent cells represent minterms (or maxterms) that differ by exactly one literal Cyclic encoding along each dimension At most two variables per dimension Lecture 3: 7
18 Lecture 3: K-Map for Cout AB Cin Cout S Cin B A Cout S Cin B A Cout S Cin B A Cout S Cin B A 8
19 Some K-Map Definitions -cell: Minterm of a canonical sum Implicant: Set of adjacent -cells A rectangle in K-Map Number of cells contained must be a power of 2 Prime Implicant: Implicant that cannot be contained in a larger implicant AB Cin A prime implicant Lecture 3: 9
20 Minimization Using K-Map Goal: Cover all -cells with the minimum number of prime implicants Procedure Plot s corresponding to minterms of function Circle largest possible rectangular sets of s Must be power of 2 Including wrap-around sets Repeat until all minterms are covered OR product terms derived from each circle Minimizes number of gates and gate inputs Lecture 3: 2
21 Simplifying Cout Using a K-Map Cout = A' B Cin + A B' Cin + A B Cin' + A B Cin = A' B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin (idempotency) = B Cin + A B' Cin + A B Cin' + A B Cin (combining) = B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin (idempotency) = B Cin + A Cin + A B Cin' + A B Cin (combining) = B Cin + A Cin + A B (combining) AB Cin Ovals result from applying combining theorem Idempotency theorem allows ovals to overlap Lecture 3: 2
22 3 Variable K-Map Example F=Σ A,B,C (4,5,6,7) C AB F = A Lecture 3: 22
23 Another Example F=Σ A,B,C (,,2,4,5,7) C AB A C B A C F = A C + B + A C Lecture 3: 23
24 Spatial encoding! Intuition Behind K-Map Lecture 3: 24
25 4 Variable K-Map CD AB Lecture 3: 25
26 Combining Theorem in Action CD AB A BC D + A BCD + ABC D + ABCD A BD + BD ABD Lecture 3: 26
27 Combining Theorem in Action CD AB A B C D + A B CD + AB C D + AB CD A B D + AB D B D Lecture 3: 27
28 4 Variable Karnaugh Map Example F=Σ A,B,C,D (5,7,2,3,4,5) CD AB F = B D + A B Lecture 3: 28
29 Another Example Detect all even digits from to 5 except 6 F=Σ A,B,C,D (,2,4,8,,2,4) CD AB F = B D + AD + C D Lecture 3: 29
30 Minimizing Product-of-Sums Procedure Plot s corresponding to maxterms of function Circle largest possible rectangular sets of s Must be power of 2 Including wrap-around sets Repeat until all maxterms are covered AND sum terms derived from each circle Lecture 3: 3
31 Product-of-Sums Example F=π A,B,C,D (, 2, 6, 7, 8, ) CD AB Corners: B+D Other: A+B +C F=(B+D) (A+B +C ) Lecture 3: 3
32 H&H.7, 2.8 Before Next Class Next Time CMOS Logic Lecture 3: 32
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