Using Contrapositive Law in an Implication Graph to Identify Logic Redundancies

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1 Using Contrpositive Lw in n Implition Grph to Ientify Logi Reunnies Kunl K. Dve Vishwni D. Agrwl Mihel L. Bushnell ATI Reserh INC. Auurn University, Dept. of ECE Rutgers University, Dept. of ECE Yrley, PA 9067, USA Auurn, AL 36849, USA Pistwy, NJ 08854, USA kve@ti.om vgrwl@eng.uurn.eu ushnell@ip.rutgers.eu Astrt Implition grphs re use to solve the test genertion, reunny ientifition, synthesis, n verifition prolems of igitl iruits. We propose new oring noe struture to represent prtil implitions in grph. The oring noe is the ontrpositive of the previously use ning noe. An n-input gte requires one oring n one ning noes to represent ll prtil implitions. This implition grph is shown to e more omplete n more ompt ompre to the previously pulishe (n+) ning noe grph. Introution of the new oring noe fins more reunnies using the trnsitive losure metho. The seon ontriution of the present work is set of new lgorithms to upte trnsitive losure for every newly e ege in the implition grph ssoite with ning n oring noes. For the ISCAS 85 enhmrk iruit 908, the new grph ientifies 5 out of totl of 7 reunnt fults. The est known previous implition grph proeure oul only ientify reunnt fults. We nlyze the unientifie reunnt fults n suggest possile improvement.. Introution An implition grph (IG) is representtion of igitl iruit in the form of set of inry n higher-orer reltions etween signls. It is use to solve systems of Boolen equtions for test genertion, reunny ientifition, synthesis, n verifition prolems involving igitl iruits. We fous on the pplition of implition grph to fultinepenent reunny ientifition. Reunny ientifition is useful in VLSI testing n esign synthesis. There re two si methos for ientifying reunnt fults: fult-epenent tehniques n fult-inepenent tehniques. Fultepenent tehniques re minly ATPG se methos [4, 8,, 5,,, 3, 3, 33, 36], whih trget prtiulr fult t time. Lrree [3, 4], strting with the Boolen ifferene n Chkrhr et l. [5, 7, 9], with the neurl network moel, rrive t the stisfiility formultion of the ATPG prolem. Both solve the prolem with the help of implition grphs. Fult-inepenent tehniques nlyze the iruit topology n funtion without trgeting speifi fult. To limit the omplexity of the nlysis, pproximtions n restritions re often use. These methos n fin some reunnies very quikly [0] ut re not exhustive in terms of fining ll reunnt fults. Suh methos n e further lssifie s testility nlysis [, 6, 7, 30, 35] or implition se tehniques [, 0,, 4, 0, 8, 9]. Agrwl et l. propose fult-inepenent reunny ientifition tehnique using n implition grph n trnsitive losure tht nlyzes iruit topology n funtion without trgeting speifi fult []. In their work, they efine oservility vriles, O x, for every iruit line x. This vrile ssumes the logi vlue only when x is oservle t primry output. Gur et l. [4] presente trnsitive losure lgorithm for implition grphs tht ontin prtil implitions, where vertex n ssume the true stte when ll verties tht prtilly imply it eome true. They represent these prtil implition with the help of ning noes [8, 37]. While the ning noes potentilly improve the representtion, they fori strightforwr omputtion of TC. The metho of Gur et l. provies improve results with liner time omplexity. Further improvements with ll iret n prtil implitions n for noe fixtions were presente y Meht et l. [8]. An implition grph ontining full n prtil implitions n ning noes is n inomplete representtion of the Boolen funtion of the iruit, whih motivte our work to further improve this representtion. We propose new type of prtil noe, lle oring noe, to inorporte more omplete logi informtion in the implition grph. We lso propose set of new lgorithms to upte trnsitive losure every time new implition ege is e into the grph tht ontins signl noes, ning noes n oring noes. We pply the new implition grph n the upte lgorithms to fult-inepenent reunny ientifition n emonstrte improve performne.. Prior work An implition grph (IG) is representtion of igitl iruit in the form of set of inry n higher-orer reltions etween signls. This grph hs noe for every literl. Thus, Boolen vrile x is represente y two noes, x n x. A noe n e true or flse. For x =, the x noe ssumes the true stte. For x = 0, x eomes true. Let us tke n exmple of two-input AND gte (Figure ). The expne Boolen flse funtion [6] for this AND gte n e written s: + + = 0 () Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

2 Contrpositive Figure 3: Oring noe from n ning noe. Figure : Diret implitions for -input AND gte. 3 Figure : Prtil implitions for -input AND gte. For Eqution to hol, ll three terms on the left hn sie must e 0. The first two terms show inry (pir-wise) reltionships etween signls. To mke the first term = 0, one of the following reltions shoul e stisfie:. if = 0 then = 0. if = then = The first onition gives the implition, ( implies ). We lso otin the implition from the seon onition. Similrly, the seon term gives the implitions, n. A two-vrile if... then luse is represente s irete ege from literl representing the if onition to nother literl representing the then luse. The logil implitions re expresse s eges. The inry reltionships otine from Eqution n e represente in the implition grph of irete eges s shown in Figure [, 3, 7]. An enhne implition grph (EIG) ws propose y Henftling et l. [8, 37]. Gur et l. [4] use it for reunny ientifition. The term, higherorer term in Eqution, is ternry reltionship. To mke the term = 0 one of the following reltionl onitions shoul e stisfie:. if = n =, then =. if = 0 n =, then = 0 3. if = 0 n =, then = 0 These reltionships give prtil implitions. The implition grph for the AND gte with ning noes is shown in Figure. The symol is use for the ning noe in Figure. The trversl of the grph with ning noes requires speil onsiertion. We nnot trverse through n ning noe unless we n rrive t it through ll inoming eges. In generl, for n n-input gte we require n + ning noes, eh hving n inoming eges n one outgoing ege. Also for eh input signl of the gte n impliit oservility AND gte expresses the oservility relte implitions [, 4]. For exmple, for signl the oservility is expresse s O = O. Eh of these n impliit gtes requires n + ning noes with n inoming eges n one outgoing ege. Thus, to represent ll the ontrollility n oservility prtil implitions EIG requires (n + ) prtil noes. 3. Oring noes We introue new type of prtil noe lle oring noe. There exists logil ientity etween two Boolen vriles lle the ontrpositive lw [34]: (P Q) (Q P ) () This mens tht if vrile P implies nother vrile Q then we onlue tht the flse stte of Q implies the flse stte of P. We introue new implition reltion in the implition grph, the OR implition, tht expliitly represents some ontrpositive eges tht re otherwise missing from implition grphs. We represent these reltionships using n oring noe, whih is similr to the ning noe use in severl previous methos [3, 4, 6, 7, 8]. Let us gin onsier the exmple of two input AND gte s shown in Figure to erive the oring noe. The expne Boolen flse funtion for this gte is given y Eqution. As isusse in Setion, we otin two full implitions from the first inry term on the left hn sie of Eqution (, ). If we nlyze these two implitions, we n onlue tht implition is ontrpositive implition of oring to Eqution, n vie vers. Also, the sme onlusion pplies to the other two implitions (, ) otine from the seon term in the Boolen flse funtion. We lso hve ternry term in the Boolen flse funtion, whih proues prtil implitions s shown y n ning noe on the left hn sie in Figure 3. If we pply the ontrpositive rule to the forwr prtil implition ( ) we n otin the reltion ( ). Aoring to e Morgn s Lw [5] of Boolen lger, we n estlish the following reltionships: n (P Q) (Q P ) (3) (P Q) (Q P ) (4) We use the e Morgn s lw of Eqution 4 to trnsform the term ( ) into n rewrite the forwr prtil implition ( ) s. Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

3 Upte 4 3 Figure 4: New implition grph of AND gte. This mens output = 0 requires either input = 0 or = 0. This informtion n e represente in the implition grph s shown on the right hn sie in Figure 3. Thus, for every ning noe of the implition grph in Figure, we n fin orresponing ontrpositive oring noe. Let us onsier nother ning implition ( ) shown in Figure. The ontrpositive oring noe is ( ). This implition mens tht if signl = then either = 0 or =. It oes not represent meningful informtion in the implition grph s ny vlue on signl oes not rely on signl n lso ny logil onlusion nnot e rwn out the vlue on signl just with signl = without ny knowlege of the vlue on signl. Similrly, no informtion n e inferre from ontrpositive oring noe,, otine from the ning noe. Thus, we ignore the implementtions of these oring noes in the implition grph. Also, we introue n lgorithm tht uses oring noes to otin prtil implitions tht were previously otine y the other two ning noes shown in Figure. The new implition grph (IG) for two-input AND gte with ll the ontrollility relte prtil implitions is shown in Figure 4. In generl, the propose IG requires only one ning noe n one oring noe to represent ontrollility reltions for n-input logi gte. Also, one ning n one oring noes re require to represent eh oservility AND gte s expline in Setion. Thus, the propose implition grph requires (n + ) prtil noes to represent ll the ontrollility n oservility relte prtil implitions s ompre (n + ) prtil noes use y EIG. 4. Trnsitive losure Upte lgorithms In this setion we first propose n lgorithm tht, given trnsitive losure grph n new full implition ege to e e, proues n upte trnsitive losure. This lgorithm oes not el with prtil implitions. The lgorithm is given elow. Here G is n initil trnsitive losure to whih n ege from soure noe v s to estintion noe v n is e. The routine Upte(G, v s, v n ) returns G s the upte trnsitive losure. Algorithm: Upte () Upte(G, v s, v n ) { () for eh prent P i of soure v s { (3) for eh hil C j of estintion v n { Figure 5: Trnsitive losure upte for new full ege using the Upte lgorithm. Tle : Prent n hil noe list for the grph of Figure 5 efore ing the ege. Noes Prent List Chil List,,,,,, (4) if (ege P i C j oes not exist) (5) T Ege(P i, C j ); } } } (6) / Upte / where T Ege(P i, C j ) routine is only lle when the onition of line (4) is true. It s trnsitive losure ege from noe P i to noe C j. As n exmple, onsier the grph shown on the left in Figure 5 without the she line ege. This grph is trnsitive losure with four noes n three eges (shown y soli lines). When new ege from noe to noe (shown with she rrow) is e, the Upte(G,, ) routine is lle with v s = n v n =. This tivtes lines () to (6) in the lgorithm shown ove. The for loop in line () exeutes two times euse noe hs two prent noes s shown in Tle. The inner for loop in line (3) lso exeutes two times s noe hs two hil noes. In the first itertion, P i = n C j =. There is no ege etween noes n, whih stisfies the onition in line (4). Thus, the lgorithm goes to line (5) n lls T Ege (, ) to the trnsitive losure ege. It follows similr steps for n eges in the seon n thir itertions n s TC eges n, respetively, s shown in Figure 5. For the ege, the onition in line (4) is not stisfie s there lrey exists n ege from noe to noe. Thus, the lgorithm oes not ll T Ege(, ) for this ege. The upte trnsitive losure grph is shown on the right in Figure Upte for prtil implitions We propose trnsitive losure upte lgorithms tht onvert prtil implitions into possile full implitions using ning n oring noes. We explin these lgorithms using n exmple. Figure 6 shows n exmple where two AND gtes re fe y the sme input signls n. In our tehnique, the omputtion strts with ll inry signl noes, ning noes with only the prtil inoming eges n one outgo- Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

4 Figure 6: Implition grph of iruit (left) efore the pplition of upte lgorithms. ing ege, n oring noes with the prtil outgoing eges n one inoming ege (see Figure 6). Now, every time new trnsitive losure ege is e euse of the Upte routine, we hek if the estintion noe v n is prent of ny ning noe x. If this onition is stisfie we hek the prent noes of the ning noe x. For ll of the noes in this list of prent noes, we try to fin ommon preeessor noe G p. If suh noe is foun we n put trnsitive losure ege from the noe G p to the hil noe of the ning noe x (proeure ). We propose nother lgorithm to trverse the oring noes. Every time new trnsitive losure ege is e y the Upte routine, we hek if the soure noe v s is hil of ny oring noe x. If this onition is stisfie, we hek the hil noes of the oring noe x. For ll of the noes in this list of hil noes, we try to fin ommon suessor noe G. If suh noe is foun we put trnsitive losure ege from the prent of the oring noe to tht ommon suessor noe G (proeure ). Figure 6 shows n implition grph of the iruit efore upte lgorithms re exeute. This grph is trnsitive losure of itself. In this grph eh noe is onsiere s prent n hil of itself s this is si property of ny trnsitive losure. The first ege extrte from the logi network is from noe to noe, s we know tht if = 0 then = 0. This invokes Upte(G,, ). There is only one prent of noe n only one hil of noe in this itertion. Thus, oth the for loops in the Upte routine re exeute only one n this s TC ege. The estintion noe v n = is prent noe of n ning noe n. Thus, we hek the prent noe list of the ning noe. We try to fin ommon preeessor noe G p, in this itertion no suh noe will e foun s the preeessor list of the prent noe of noe ontins P = {, } n preeessor list of the prent noe of noe ontins noe P = {}. Thus, no TC ege will e e. Similrly, no TC ege will e e euse of the ning noe. When TC ege is e using Upte, we gin try to fin ommon grnprent of the ning noe s the new TC ege ens t prent noe of this ning noe. In this itertion, P = {, } n P = {, }. Intersetion of these two lists gives ommon preeessor noe. Thus, TC ege n e e from noe to (thik ege). Similr steps re rrie out for eges n, whih in turn s TC eges n using Upte routine n using Figure 7: A portion of the trnsitive losure fter Upte lgorithms re pplie to the implition grph for the iruit given in Figure 6. Bol rrows show eges e y proeures n. proeure esrie ove. When we extrt n implition from noe to, new TC ege will e e euse of the Upte routine. The soure noe of this TC ege is hil noe of oring noes n. Thus proeure will e tivte. In this itertion, no ommon grnhil will e foun for ny of the oring noe. When the TC ege is e using Upte, we gin try to fin ommon grnhil of the oring noe s the new TC ege strts t hil noe of the oring noe. In this itertion, hil list of noe, C = {, } n tht of noe is C = {, }. The ommon noe in these two lists n e foun s noe. Thus, TC ege n e e from noe oring to proeure (thik ege). Similrly, TC ege will e e s result of new eges n. The omplete trnsitive losure fter the pplition of Upte lgorithm, proeure n proeure is shown in Figure 7. Thus, we n see tht s ompre to trnsitive losure eges n foun y EIG [4], our IG n new lgorithms fin itionl trnsitive losure eges n. Sine more implition eges n e foun using the new implition grph n propose upte lgorithms, we my ientify more reunnies in the logi iruit. 4.. Extene use of the oring noes In the previous susetion, we isusse the use of the oring noe n the new implition grph to fin extr reunnies. We lso use the oring noes to otin kwr prtil implitions tht were previously otine using ning noes. Consier the exmple iruit shown in Figure 8. It n e seen tht the first fnout rnh of input signl nnot e oserve t the primry output e. Consier the trnsitive losure grph (otine using previous methos [3, 6] n n itionl oring noe struture) shown in Figure 8. Here, oservility noe O (oservility of fnout rnh of feeing into gte ) implies noes n O. Also, oservility of noe O implies noe. We n fin the TC ege O using ny trnsitive losure lultion routine for the implition ege O O. From the iruit topology we n otin the ning noe, Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

5 s 0 e in our new implition grph, whih provie ll of the neessry informtion s expline in the previous setion. Similrly, kwr ning noes use to represent oservility prtil reltions for eh input signl n lso e remove. O O TC Figure 8: Trnsitive losure of n exmple iruit (top) using previous metho [8]. O O TC Figure 9: Trnsitive losure of IG for the iruit of Figure 8 using the propose metho. where noe n noe together through this ning noe imply noe. Now noes n fee into the ning noe through prtil eges, whih implies noe. Thus, we the TC ege O. This gives us onition to ientify the s--0 reunny on line. We lssify this type of ning noe s kwr ning implition s it gives prtil implition from n output noe () to n input noe (). We use the oring noe struture to otin ll of the prtil implitions tht were otine using this type of kwr ning noes. Let us onsier the trnsitive losure grph shown in Figure 9 without the ning noes. Here we hve remove the ning noe from the grph. Now, if we onsier the sme TC without the ning noe we still hve the TC ege O. As we n see, noe implies either noe noe through the oring noe. This iniretly sys tht oservility of noe O implies either signl = 0 or = 0. Now, if we hek the hil noes of O, they hve noe in them. Tht mens the O nnot imply noe through the oring noe. Tht in turn implies signl = 0, whih gives trnsitive losure ege O. Here, we otine the sme TC ege tht ws otine using the ning noe in Figure 8. The informtion ontine in the kwr ning noe (( ) ) of Figure 8 is lso inlue in the sme oring noe. In generl, from the three ning noes (one forwr n two kwr) use to represent ontrollility prtil reltions in Figure, we only require one forwr ning noe (( ) ) n one oring noe 5. Results Results for ISCAS 85 n ISCAS 89 enhmrk iruits re shown in Tle. Stn-lone omintionl prts of ISCAS 89 sequentil iruits were onsiere. The first olumn of the result tle shows the nme of the enhmrk iruit for whih results from vrious progrms re ompre with respet to the reunnt fults ientifie n their respetive CPU times. There re no orte fults in TRAN for ll iruits in Tle. The next two olumns show the reunnt fults ientifie n the CPU times in seons for the ATPG tool TRAN [8] y Chkrhr et l., whih uses trnsitive losure for test genertion. The next two olumns list the results of FIRE [9] y Iyer n Armovii. The next two olumns show the results of the trnsitive losure lgorithm with some of the prtil implitions y Gur et l. [4]. The next two olumns show the results of the trnsitive losure lgorithm with ll of the prtil implitions otine using ning noes y Meht et l. [8]. The lst two olumns re the results otine using our new implition grph n the propose lgorithms. We ientifie 5 out of the totl of 7 reunnt fults in the 908 omintionl enhmrk iruit in 5.7 CPU seons, while the ATPG tool TRAN [8] ientifies ll of the 7 reunnt fults in 3.0 CPU seons. FIRE [0] ientifies 6 reunnt fults in.8 CPU seons, TC G [3] ientifies reunnt fults in 0.9 CPU seons, n TC M [8] ientifies reunnt fults in 3. CPU seons. We ientify 65 reunnt fults in the 75 omintionl enhmrk iruit in 7.7 CPU seons, while the ATPG tool TRAN [8] ientifies ll of the 3 reunnt fults in CPU seons. FIRE [0] ientifies 30 reunnt fults in 4.7 CPU seons, TC G [3] ientifies 34 reunnt fults in 5.8 CPU seons, n TC M [8] ientifies 5 reunnt fults in.5 CPU seons. We ientify 5 reunnt fults in the s38 omintionl enhmrk iruit in 5.4 CPU seons, while TRAN ientifies ll 69 reunnt fults in 7.4 CPU seons. FIRE ientifies 6 reunnt fults in.9 CPU seons, TC G ientifies 6 reunnt fults in 0.6 CPU seons, n TC M ientifies 0 reunnt fults in.6 CPU seons. We ientify more reunnt fults then ll other fult-inepenent tehniques in ll of the enhmrk iruits, with omprle CPU time of exeution. In some enhmrk iruits suh s 535, 688, s349, s73, n s43 we ientify lmost s mny reunnt fults s TRAN oes, ut we o it muh fster. Two unientifie reunnt fults of 908 re shown in Figure 0. Ativtion of these fults requires logi 0 on signl 949 or on 953. In either se, signls 74, 887 n 886 eome unoservle. Although eh fnout rnh of 979 is unoservle, lking n oservility reltion etween stem n Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

6 Tle : Comintionlly reunnt fults ientifie in ISCAS 85 n ISCAS 89 iruits. Numer of reunnt fults ientifie n run time Ciruit Totl TRAN [8] FIRE [0] T C G [4] T C M [8] Our metho fults Re. CPU s Re. CPU s Re. CPU s Re. CPU s Re. CPU s fults Spr 5 fults Spr fults Spr 5 fults Spr 5 fults Spr s s s s s s s s s s s 979 Figure 0: Two reunnt fults of 908 tht were not ientifie y the implition grph lgorithm. Some fnins re omitte for lrity. its fnout rnhes, we re unle to eue tht 979 is unoservle. Kirkln n Merer [] stte tht oservtion of signl requires the simultneous oservtion of ll of its solute omintors. Asolute omintors of signl 979 re 886, 887 n 74. No pth from 979 n reh ny primry output without pssing through ll of its solute omintors. If we enhne the implition grph y pling implition rs from the flse oservility noes (Ō) of ny or ll solute omintors to the Ō noe of orresponing ominte fnout stem signl, then the two reunnt fults will e ientifie. 6. Conlusion We erive new prtil implition struture lle the oring noe to represent logil epenenies of signls in the implition grph. Results inite tht for fult-inepenent reunny ientifition tehnique the propose implition grph otins etter results. Also, s ompre to the (n+) prtil implition ning noes use y Meht et l. [6, 8], we only use (n + ) prtil implition noes (ning + oring noes) for n n-input logi gte. Our new lgorithms ynmilly upte trnsitive losure every time n implition ege is e. These lgorithms evlute ning noes n oring noes to onvert prtil implitions into full implitions, whih in turn new trnsitive losure eges to the grph. We evise our lgorithm suh tht it uses the propose oring noes to get ll of the implitions tht were previously otine using kwr implition ning noes. Repete use of these lgorithms onstruts trnsitive losure from n implition grph with full n prtil implitions. One the trnsitive losure grph is lulte, we follow the sme proeure use y previous tehniques to fin reunnies in the igitl iruit. Mny unientifie reunnt fults re on fnout stems. Their nlysis suggests further improvements. However, reunny ientifition hs n exponentil omplexity. So, ny implition grph or trnsitive losure se metho with polynomil omplexity will fil to ientify some reunnt fults. The present work provies improvements over previous lgorithms in the polynomil omplexity lss. Referenes [] V. D. Agrwl, M. L. Bushnell, n Q. Lin, Reunny Ientifition Using Trnsitive Closure, in Pro. of the 5th Asin Test Symp., Novemer 996, pp [] V. D. Agrwl n M. R. Merer, Testility Mesures Wht Do They Tell Us?, in Pro. of the Interntionl Test Conf., Novemer 98, pp [3] M. L. Bushnell n V. D. Agrwl, Essentils of Eletroni Testing for Digitl, Memory n Mixe- Signl VLSI Ciruits. Boston, MA: Kluwer Aemi Pulishers, 000. [4] M. L. Bushnell n J. Girli, A Funtionl Deomposition Metho for Reunny Ientifition n Test Genertion, Journl of Eletroni Testing: Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

7 Theory n Applitions, vol. 0, no. 3, pp , June 997. [5] S. T. Chkrhr, Neurl Network Moels n Optimiztion Methos for Digitl Testing. PhD thesis, Rutgers University, CS Dept., Otoer 990. [6] S. T. Chkrhr, V. D. Agrwl, n M. L. Bushnell, Neurl Net n Boolen Stisfiility Moels of Logi Ciruits, IEEE Design n Test of Computers, vol. 7, no. 5, pp , Otoer 990. [7] S. T. Chkrhr, V. D. Agrwl, n M. L. Bushnell, Neurl Moels n Algorithms for Digitl Testing. Boston, MA: Kluwer Aemi Pulishers, 99. [8] S. T. Chkrhr, V. D. Agrwl, n S. G. Rothweiler, A Trnsitive Closure Algorithm for Test Genertion, IEEE Trns. on Computer-Aie Design, vol., no. 7, pp , July 993. [9] S. T. Chkrhr, M. L. Bushnell, n V. D. Agrwl, Automti Test Genertion Using Neurl Networks, in Pro. of the Interntionl Conf. on Computer-Aie Design, Novemer 988, pp [0] K. K. Dve, Using Contrpositive Rule to Enhne the Implition Grphs of Logi Ciruits, Mster s thesis, Rutgers University, ECE Dept., My 004. [] K. K. Dve, V. D. Agrwl, n M. L. Bushnell, Using Contrpositives to Enhne the Implition Grph of Logi Ciruits, in Pro. of the 3 th IEEE North Atlnti Test Workshop, June 004, pp [] H. Fujiwr n T. Shimono, On the Aelertion of Test Genertion Algorithms, in Pro. of the Interntionl Fult-Tolernt Computing Symp., June 983, pp [3] V. Gur, A New Trnsitive Closure Algorithm to Ientify Reunnies in Logi Ciruits, Mster s thesis, Rutgers University, ECE Dept., Jnury 00. [4] V. Gur, V. D. Agrwl, n M. L. Bushnell, A New Trnsitive Closure Algorithm with Applitions to Reunny Ientifition, in Pro. of the st Interntionl Workshop on Eletroni, Design n Test Applitions (DELTA 0), Jnury 00, pp [5] P. Goel, An Impliit Enumertion Algorithm to Generte Tests for Comintionl Logi Ciruits, IEEE Trns. on Computers, vol. C-30, no. 3, pp. 5, Mrh 98. [6] L. H. Golstein, Controllility/Oservility Anlysis of Digitl Ciruits, IEEE Trns. on Ciruits n Systems, vol. CAS-6, no. 9, pp , Septemer 979. [7] J. Grson, TMEAS, Testility Mesurement Progrm, in Pro. of the 6 th Design Automtion Conf., 979, pp [8] M. Henftling n H. Wittmnn, A New Dt Struture to Solve the Stisfiility Prolem in Digitl Ciruits, Arhiv fiir Elektronik Un Oertrgungstehnik, vol. 49, no., pp. 9 43, Jnury 995. [9] M. A. Iyer n M. Armovii, Low-ost Reunny Ientifition for Comintionl Ciruits, in in Pro. of 7 th Interntionl Conf. on VLSI Design, Jnury 994, pp [0] M. A. Iyer n M. Armovii, FIRE: A Fult- Inepenent Comintionl Reunny Ientifition Algorithm, IEEE Trnstions on VLSI Systems, vol. 4, no., pp , June 996. [] T. Kirkln n M. R. Merer, A Topologil Serh Algorithm for ATPG, in Pro. of the 4 th Design Automtion Conf., June-July 987, pp [] W. Kunz n D. K. Prhn, Reursive Lerning: An Attrtive Alterntive to the Deision Tree for Test Genertion in Digitl Ciruits, in Pro. of the IEEE Interntionl Test Conf., Septemer 99, pp [3] T. Lrree, Effiient Genertion of Test Ptterns Using Boolen Differene, in Pro. of the Interntionl Test Conf., August 989, pp [4] T. Lrree, Test Pttern Genertion Using Boolen Stisfiility, IEEE Trnstions on Computer-Aie Design, vol., no., pp. 4 5, Jnury 99. [5] M. M. Mno, Digitl Logi n Computer Design. Englewoo Cliffs, NJ: Prentie-Hll, In., 979. [6] V. J. Meht, Reunny Ientifition in Logi Ciruits using Extene Implition Grph n Stem Unoservility Theorems, Mster s thesis, Rutgers University, ECE Dept., Pistwy, New Jersey, My 003. [7] V. J. Meht, V. D. Agrwl, n M. L. Bushnell, Theorems on Reunny Ientifition, in Pro. of the th North Atlnti Test Workshop, My 003. [8] V. J. Meht, K. K. Dve, V. D. Agrwl, n M. L. Bushnell, A Fult-Inepenent Trnsitive Closure Algorithm for Reunny Ientifition, in Pro. of the 6 th Interntionl Conf. VLSI Design, Jnury 003, pp [9] P. R. Menon, H. Ahuj, n M. Hrihr, Reunny Ientifition n Removl in Comintionl Ciruits, IEEE Trns. on Computer-Aie Design of Integrte Ciruits n Systems, vol. 3, no. 5, pp , My 994. [30] I. M. Rtiu, A. Sngiovnni-Vinentelli, n D. O. Peerson, VICTOR: A Fst VLSI Testility Anlysis Progrm, in Pro. of the IEEE Interntionl Test Conferene, Novemer 98, pp [3] J. P. Roth, Digonosis of Automt Filures: A Clulus n Metho, IBM Journl of Reserh n Development, vol. 0, no. 4, pp. 78 9, July 966. [3] M. H. Shulz, E. Trishler, n T. M. Serfert, SOCRATES: A Highly Effiient Automti Test Pttern Genertion System, IEEE Trns. on Computer-Aie Design, vol. CAD-7, no., pp. 6 37, Jnury 988. [33] J. P. M. Silv n K. A. Skllh, Grsp A New Serh Algorithm for Stisfiility, in Pro. of the Interntionl Conf. on Computer-Aie Design, Novemer 996, pp [34] D. F. Stnt n D. A. MAllister, Disrete Mthemtis in Computer Siene. Englewoo Cliffs, NJ: Prentie-Hll, In., 977. [35] J. E. Stephenson n J. Grson, A Testility Mesure for Register Trnsfer Level Digitl Ciruits, in Pro. of the Int. Symp. on Fult Tolernt Computing, Pittsurgh, PA, June 976, pp [36] P. Tfertshofer, A. Gnz, n K. J. Antreih, IGRAINE An Implition GRph Ase engine for Fst Implition, Justifition n Propgtion, IEEE Trns. Computer-Aie Design, vol. 9, no. 8, pp , August 000. [37] P. Tfertshofer, A. Gnz, n M. Henftling, A SAT- Bse Implition Engine for Effiient ATPG, Equivlene Cheking n Optimiztion of Netlists, in Pro. of the Interntionl Conf. on Computer-Aie Design, Novemer 997, pp Pro. 8th Interntionl Conferene on VLSI Design, Jn. 3-7, 005, pp

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